{"id":119157,"date":"2024-08-07T15:43:09","date_gmt":"2024-08-07T13:43:10","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/dostupen-vortex-2-2-otkrytyj-gpgpu-na-baze-arhitektury-risc-v"},"modified":"2024-08-07T15:43:09","modified_gmt":"2024-08-07T13:43:10","slug":"dostupen-vortex-2-2-otkrytyj-gpgpu-na-baze-arhitektury-risc-v","status":"publish","type":"post","link":"https:\/\/prohoster.info\/az\/blog\/novosti-interneta\/dostupen-vortex-2-2-otkrytyj-gpgpu-na-baze-arhitektury-risc-v","title":{"rendered":"Vortex 2.2 m\u00f6vcuddur, RISC-V arxitekturas\u0131na \u0259saslanan a\u00e7\u0131q GPGPU","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

Vortex 2.2 layih\u0259sinin burax\u0131l\u0131\u015f\u0131 d\u0259rc olunub, bu a\u00e7\u0131q GPGPU, RISC-V komanda d\u0259stinin arxitekturas\u0131na \u0259saslanaraq paralel hesablamalar\u0131n h\u0259yata ke\u00e7irilm\u0259si \u00fc\u00e7\u00fcn OpenCL API v\u0259 SIMT (T\u0259k \u0130stifad\u0259, \u00c7ox \u0130p) icra modelini istifad\u0259 etm\u0259y\u0259 imkan verir. Layih\u0259 3D qrafika sah\u0259sind\u0259 t\u0259dqiqatlar aparmaq v\u0259 yeni GPU arxitekturalar\u0131n\u0131 inki\u015faf etdirm\u0259k \u00fc\u00e7\u00fcn d\u0259 istifad\u0259 oluna bil\u0259r. Verilog dilind\u0259ki texnologiyal\u0131 sxeml\u0259r, aparat bloklar\u0131n\u0131n t\u0259svirl\u0259ri, simulator, s\u00fcr\u00fcc\u00fcl\u0259r v\u0259 dig\u0259r layih\u0259 s\u0259n\u0259dl\u0259ri Apache 2.0 lisenziyas\u0131 alt\u0131nda yay\u0131l\u0131r. <\/p>\n

GPGPU-nun \u0259sas\u0131n\u0131 RISC-V tipli ISA t\u0259\u015fkil edir, bu is\u0259 GPU funksiyalar\u0131n\u0131 d\u0259st\u0259kl\u0259m\u0259k v\u0259 ax\u0131nlar\u0131 idar\u0259 etm\u0259k \u00fc\u00e7\u00fcn laz\u0131m olan b\u0259zi \u0259lav\u0259 t\u0259limatlarla geni\u015fl\u0259ndirilmi\u015fdir. RISC-V komanda d\u0259stind\u0259ki memarl\u0131q d\u0259yi\u015fiklikl\u0259ri minimuma endirilmi\u015f v\u0259 m\u00fcmk\u00fcn olduqda art\u0131q m\u00f6vcud olan vektor t\u0259limatlar\u0131ndan istifad\u0259 edilmi\u015fdir. \u018flav\u0259 t\u0259limatlar aras\u0131nda tekstura emal\u0131n\u0131 s\u00fcr\u0259tl\u0259ndirm\u0259k \u00fc\u00e7\u00fcn 'tex', rasterl\u0259\u015fdirm\u0259ni idar\u0259 etm\u0259k \u00fc\u00e7\u00fcn vx_rast, fraqmentl\u0259rin, d\u0259rinliyin v\u0259 \u015f\u0259ffafl\u0131\u011f\u0131n emal\u0131 \u00fc\u00e7\u00fcn vx_rop, '\u00e7arp v\u0259 \u0259lav\u0259 et' \u0259m\u0259liyyat\u0131n\u0131 yerin\u0259 yetirm\u0259k \u00fc\u00e7\u00fcn vx_imadd, t\u0259limatlar\u0131n v\u0259 ax\u0131nlar\u0131n aktivl\u0259\u015fdirilm\u0259si \u00fc\u00e7\u00fcn vx_wspawn, vx_tmc v\u0259 vx_bar (wavefront, paralel SIMD Engine t\u0259r\u0259find\u0259n icra olunan iplikl\u0259r toplusu), vx_split v\u0259 vx_join qeyd oluna bil\u0259r.

\"Vortex<\/center> <\/p>\n

\u0130nki\u015faf etdiril\u0259n GPGPU 32 v\u0259 64 bitlik RISC-V RV32IMF v\u0259 RV64IMAFD komanda d\u0259stl\u0259rini d\u0259st\u0259kl\u0259yir v\u0259 se\u00e7im olaraq payla\u015f\u0131lm\u0131\u015f yadda\u015f, L1, L2 v\u0259 L3 s\u0259viyy\u0259li ke\u015fl\u0259r, el\u0259c\u0259 d\u0259 konfiqurasiya edil\u0259 bil\u0259n n\u00fcv\u0259l\u0259rin, tap\u015f\u0131r\u0131qlar\u0131n bloklar\u0131n\u0131n (warps) v\u0259 ipl\u0259rin say\u0131 il\u0259 uy\u011funla\u015fd\u0131r\u0131la bil\u0259r. H\u0259r bir n\u00fcv\u0259 \u00fc\u00e7\u00fcn konfiqurasiya edil\u0259 bil\u0259n ALU, FPU, LSU v\u0259 SFU say\u0131 daxil etm\u0259k imkan\u0131 var. Prototipl\u0259r \u00fc\u00e7\u00fcn Altera Arria 10, Altera Stratix 10, Xilinx Alveo U50, U250, U280 v\u0259 Xilinx Versal VCK5000 FPGA-lar\u0131 istifad\u0259 oluna bil\u0259r. \u00c7ipin i\u015fini simulyasiya etm\u0259k \u00fc\u00e7\u00fcn Verilator (Verilog simulatoru), RTLSIM (RTL simulyasiyas\u0131) v\u0259 SimX (proqram simulyasiyas\u0131) t\u0259tbiq edil\u0259 bil\u0259r. <\/p>\n

T\u0259tbiq inki\u015faf\u0131 \u00fc\u00e7\u00fcn Vortex il\u0259 i\u015fl\u0259m\u0259k \u00fc\u00e7\u00fcn uy\u011funla\u015fd\u0131r\u0131lm\u0131\u015f PoCL (OpenCL \u00fc\u00e7\u00fcn kompilyator v\u0259 runtime), LLVM\/Clang, GCC v\u0259 Binutils daxil ed\u0259n al\u0259tl\u0259r d\u0259sti t\u0259qdim olunur. Layih\u0259 OpenCL 1.2 spesifikasiyas\u0131n\u0131 d\u0259st\u0259kl\u0259yir v\u0259 OpenCL-\u0259 transmisiya vasit\u0259sil\u0259 SPIR-V \u015faderl\u0259rinin aral\u0131q t\u0259svirini d\u0259st\u0259kl\u0259yir. Vortex texnologiyalar\u0131 \u00fc\u00e7\u00fcn a\u00e7\u0131q GPU Skybox inki\u015faf etdirilir, bu da Vulkan qrafik API-n\u0131 d\u0259st\u0259kl\u0259yir. FPGA Altera Stratix 10 \u0259sas\u0131nda yarad\u0131lan Skybox prototipi 32 n\u00fcv\u0259 (512 ip) il\u0259 v\u0259 230 MHz tezliyind\u0259 iken, saniy\u0259d\u0259 3.7 gigapikseld\u0259 n\u0259tic\u0259 \u0259ld\u0259 etm\u0259y\u0259 imkan verdi (saniy\u0259d\u0259 29.4 gigatransaksiya). <\/p>\n

Vortex 2.2 versiyas\u0131nda ba\u015f ver\u0259n d\u0259yi\u015fiklikl\u0259r: <\/p>\n