{"id":100740,"date":"2021-07-12T04:22:42","date_gmt":"2021-07-12T02:22:43","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/gotov-k-proizvodstvu-pervyj-prototip-otkrytogo-chipa-libre-soc"},"modified":"2021-07-12T04:22:42","modified_gmt":"2021-07-12T02:22:43","slug":"gotov-k-proizvodstvu-pervyj-prototip-otkrytogo-chipa-libre-soc","status":"publish","type":"post","link":"https:\/\/prohoster.info\/cs\/blog\/news\/gotov-k-proizvodstvu-pervyj-prototip-otkrytogo-chipa-libre-soc","title":{"rendered":"Prvn\u00ed prototyp otev\u0159en\u00e9ho \u010dipu Libre-SOC je p\u0159ipraven k v\u00fdrob\u011b","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

Projekt Libre-SOC vyv\u00edj\u00ed otev\u0159en\u00fd \u010dip se hybridn\u00ed architekturou ve stylu CDC 6600, kde jsou instrukce CPU, VPU a GPU slou\u010deny do jedn\u00e9 ISA za \u00fa\u010delem zmen\u0161en\u00ed velikosti a slo\u017eitosti \u010dipu. Dos\u00e1hl f\u00e1ze p\u0159ed\u00e1n\u00ed prvn\u00edho testovac\u00edho vzorku do v\u00fdroby. P\u016fvodn\u011b byl projekt zn\u00e1m jako Libre RISC-V, ale byl p\u0159ejmenov\u00e1n na Libre-SOC po rozhodnut\u00ed nahradit RISC-V architekturou sady instrukc\u00ed (ISA) OpenPOWER 3.0. <\/p>\n

Projekt m\u00e1 za c\u00edl vytvo\u0159it pln\u011b funk\u010dn\u00ed, zcela otev\u0159en\u00fd a bez licen\u010dn\u00edch poplatk\u016f syst\u00e9m na \u010dipu (SoC), kter\u00fd bude pou\u017eiteln\u00fd v jednodeskov\u00fdch po\u010d\u00edta\u010d\u00edch, netbooc\u00edch a r\u016fzn\u00fdch p\u0159enosn\u00fdch za\u0159\u00edzen\u00edch. Krom\u011b b\u011b\u017en\u00fdch instrukc\u00ed CPU a registr\u016f poskytuje Libre-SOC v jednom funk\u010dn\u00edm bloku procesoru mo\u017enosti prov\u00e1d\u011bn\u00ed vektorov\u00fdch operac\u00ed a specializovan\u00fdch v\u00fdpo\u010dt\u016f typick\u00fdch pro VPU a GPU. \u010cip vyu\u017e\u00edv\u00e1 architekturu sady instrukc\u00ed OpenPOWER, roz\u0161\u00ed\u0159en\u00ed Simple-V s instrukcemi pro vektorizaci a paraleln\u00ed zpracov\u00e1n\u00ed dat, a tak\u00e9 specializovan\u00e9 instrukce pro konverzi na ARGB a prov\u00e1d\u011bn\u00ed typick\u00fdch 3D operac\u00ed. <\/p>\n

Instrukce GPU jsou zam\u011b\u0159eny na pou\u017eit\u00ed s grafick\u00fdm API Vulkan, zat\u00edmco VPU se soust\u0159e\u010fuje na urychlen\u00ed konverze YUV-RGB a dek\u00f3dov\u00e1n\u00ed form\u00e1t\u016f MPEG1\/2, MPEG4 ASP (xvid), H.264, H.265, VP8, VP9, AV1, MP3, AC3, Vorbis a Opus. Pro Mesa se vyv\u00edj\u00ed svobodn\u00fd ovlada\u010d, kter\u00fd vyu\u017e\u00edv\u00e1 mo\u017enosti Libre-SOC k poskytnut\u00ed hardwarov\u011b urychlen\u00e9 programov\u00e9 implementace grafick\u00e9ho API Vulkan. Nap\u0159\u00edklad, shadery Vulkan mohou b\u00fdt p\u0159elo\u017eeny pomoc\u00ed JIT enginu pro prov\u00e1d\u011bn\u00ed za pou\u017eit\u00ed specializovan\u00fdch instrukc\u00ed dostupn\u00fdch v Libre-SOC. <\/p>\n

V dal\u0161\u00edm testovac\u00edm prototypu pl\u00e1nuj\u00ed implementovat roz\u0161\u00ed\u0159en\u00ed SVP64 (Variable-length Vectorisation), kter\u00e9 umo\u017en\u00ed vyu\u017e\u00edt Libre-SOC jako vektorov\u00fd procesor (krom\u011b 32 64bitov\u00fdch registr\u016f obecn\u00e9ho ur\u010den\u00ed bude k dispozici 128 registr\u016f pro vektorov\u00e9 v\u00fdpo\u010dty). Prvn\u00ed prototyp zahrnuje pouze jedno j\u00e1dro, kter\u00e9 pracuje na frekvenci 300 MHz, ale b\u011bhem dvou let pl\u00e1nuj\u00ed vydat 4j\u00e1drovou verzi, pot\u00e9 8j\u00e1drovou a v dlouhodob\u00e9m horizontu i 64j\u00e1drovou. <\/p>\n

Prvn\u00ed v\u00e1rka \u010dipu bude vyrobena ve spole\u010dnosti TSMC pomoc\u00ed v\u00fdrobn\u00edho procesu 180nm. V\u0161echny informace o projektu jsou dostupn\u00e9 pod svobodn\u00fdmi licencemi, v\u010detn\u011b soubor\u016f ve form\u00e1tu GDS-II, kter\u00e9 obsahuj\u00ed kompletn\u00ed popis topologie \u010dipu, dostate\u010dn\u00fd pro zah\u00e1jen\u00ed vlastn\u00ed v\u00fdroby. Libre-SOC se stane prvn\u00edm pln\u011b nez\u00e1visl\u00fdm \u010dipem postaven\u00fdm na architektu\u0159e Power, kter\u00fd nebude vyr\u00e1b\u011bt spole\u010dnost IBM. P\u0159i v\u00fdvoji byl pou\u017eit jazyk pro popis hardwaru nMigen (HDL zalo\u017een\u00fd na Pythonu, bez pou\u017eit\u00ed VHDL a Verilog), standardn\u00ed bu\u0148ky FlexLib z projektu Chips4Makers a svobodn\u00e9 VLSI n\u00e1stroje Coriolis2 pro p\u0159evod z HDL do GDS-II. <\/p>\n

V\u00fdvoj Libre-SOC byl financov\u00e1n fondem NLnet Foundation, kter\u00fd p\u0159id\u011blil 400 tis\u00edc eur na vytvo\u0159en\u00ed pln\u011b otev\u0159en\u00e9ho \u010dipu v r\u00e1mci programu zam\u011b\u0159en\u00e9ho na v\u00fdvoj ov\u011b\u0159iteln\u00fdch a d\u016fv\u011bryhodn\u00fdch z\u00e1kladn\u00edch technick\u00fdch \u0159e\u0161en\u00ed. \u010cip m\u00e1 rozm\u011bry 5,5 \u00d7 5,9 mm a obsahuje 130 tis\u00edc logick\u00fdch hradel. Obsahuje \u010dty\u0159i moduly SRAM po 4 kB a 300 MHz blok f\u00e1zov\u00e9 autoadaptace frekvence (PLL).

\"Prvn\u00ed<\/center>
\n
Zdroj: opennet.ru<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"

\u041f\u0440\u043e\u0435\u043a\u0442 Libre-SOC, \u0440\u0430\u0437\u0432\u0438\u0432\u0430\u044e\u0449\u0438\u0439 \u043e\u0442\u043a\u0440\u044b\u0442\u044b\u0439 \u0447\u0438\u043f \u0441 \u0440\u0435\u0430\u043b\u0438\u0437\u0430\u0446\u0438\u0435\u0439 \u0433\u0438\u0431\u0440\u0438\u0434\u043d\u043e\u0439 \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u044b \u0432 \u0441\u0442\u0438\u043b\u0435 CDC 6600, \u0432 \u043a\u043e\u0442\u043e\u0440\u043e\u0439 \u0434\u043b\u044f \u0443\u043c\u0435\u043d\u044c\u0448\u0435\u043d\u0438\u044f \u0440\u0430\u0437\u043c\u0435\u0440\u0430 \u0438 \u0441\u043b\u043e\u0436\u043d\u043e\u0441\u0442\u0438 \u0447\u0438\u043f\u0430 \u0438\u043d\u0441\u0442\u0440\u0443\u043a\u0446\u0438\u0438 CPU, VPU \u0438 GPU \u043d\u0435 \u0440\u0430\u0437\u0434\u0435\u043b\u0435\u043d\u044b \u0438 \u043f\u0440\u0435\u0434\u043b\u043e\u0436\u0435\u043d\u044b \u0432 \u043e\u0434\u043d\u043e\u043c ISA, \u0434\u043e\u0441\u0442\u0438\u0433 \u0441\u0442\u0430\u0434\u0438\u0438 \u043f\u0435\u0440\u0435\u0434\u0430\u0447\u0438 \u0432 \u043f\u0440\u043e\u0438\u0437\u0432\u043e\u0434\u0441\u0442\u0432\u043e \u043f\u0435\u0440\u0432\u043e\u0433\u043e \u0442\u0435\u0441\u0442\u043e\u0432\u043e\u0433\u043e \u043e\u0431\u0440\u0430\u0437\u0446\u0430. \u0418\u0437\u043d\u0430\u0447\u0430\u043b\u044c\u043d\u043e \u043f\u0440\u043e\u0435\u043a\u0442 \u0440\u0430\u0437\u0432\u0438\u0432\u0430\u043b\u0441\u044f \u043f\u043e\u0434 \u0438\u043c\u0435\u043d\u0435\u043c Libre RISC-V, \u043d\u043e \u0431\u044b\u043b \u043f\u0435\u0440\u0435\u0438\u043c\u0435\u043d\u043e\u0432\u0430\u043d \u0432 Libre-SOC \u043f\u043e\u0441\u043b\u0435 \u0440\u0435\u0448\u0435\u043d\u0438\u044f […]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":100741,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[702],"tags":[],"class_list":["post-100740","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news"],"aioseo_notices":[],"aioseo_head":"\n\t\t\n\t\n\t\n\t\n\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\n","aioseo_head_json":{"title":"\ud83e\udd47Prvn\u00ed prototyp otev\u0159en\u00e9ho \u010dipu Libre-SOC je p\u0159ipraven k v\u00fdrob\u011b | ProHoster","description":"Projekt Libre-SOC vyv\u00edj\u00ed otev\u0159en\u00fd \u010dip s implementac\u00ed hybridn\u00ed architektury ve stylu CDC 6600, kde jsou pro zmen\u0161en\u00ed velikosti a slo\u017eitosti \u010dipu instrukce CPU, VPU a GPU nesd\u011blen\u00e9 a navr\u017een\u00e9 v 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