{"id":101722,"date":"2021-10-22T10:23:30","date_gmt":"2021-10-22T08:23:30","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/kompaniya-sifive-predstavila-yadro-risc-v-operezhayushhee-po-proizvoditelnosti-arm-cortex-a78"},"modified":"2021-10-22T10:23:30","modified_gmt":"2021-10-22T08:23:30","slug":"kompaniya-sifive-predstavila-yadro-risc-v-operezhayushhee-po-proizvoditelnosti-arm-cortex-a78","status":"publish","type":"post","link":"https:\/\/prohoster.info\/cs\/blog\/news\/kompaniya-sifive-predstavila-yadro-risc-v-operezhayushhee-po-proizvoditelnosti-arm-cortex-a78","title":{"rendered":"Spole\u010dnost SiFive p\u0159edstavila j\u00e1dro RISC-V, kter\u00e9 p\u0159ekon\u00e1v\u00e1 v\u00fdkon ARM Cortex-A78","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"
Spole\u010dnost SiFive, zalo\u017een\u00e1 tv\u016frci architektury instruk\u010dn\u00ed sady RISC-V a kdysi uveden\u00e1 prvn\u00ed prototyp procesoru na b\u00e1zi RISC-V, p\u0159edstavila nov\u00e9 j\u00e1dro RISC-V CPU v \u0159ad\u011b SiFive Performance, kter\u00e9 je o 50 % rychlej\u0161\u00ed ne\u017e p\u0159edchoz\u00ed \u0161pi\u010dkov\u00e9 j\u00e1dro P550 a p\u0159ekon\u00e1v\u00e1 v\u00fdkon ARM Cortex-A78, nejv\u00fdkonn\u011bj\u0161\u00edho procesoru na b\u00e1zi architektury ARM. SoC zalo\u017een\u00e9 na nov\u00e9m j\u00e1dru jsou zam\u011b\u0159eny p\u0159edev\u0161\u00edm na serverov\u00e9 syst\u00e9my a pracovn\u00ed stanice, ale je tak\u00e9 mo\u017en\u00e9 vytvo\u0159it zjednodu\u0161en\u00e9 varianty pro mobiln\u00ed a vestav\u011bn\u00e1 za\u0159\u00edzen\u00ed. <\/p>\n
Bylo uvedeno, \u017ee ve srovn\u00e1n\u00ed s P550 nov\u00e9 procesorov\u00e9 j\u00e1dro SiFive obsahuje 16 MB L3 cache m\u00edsto 4 MB, m\u016f\u017ee kombinovat a\u017e 16 jader v jednom \u010dipu m\u00edsto 4, pracuje na frekvenci a\u017e 3,5 GHz m\u00edsto 2,4 GHz, podporuje pam\u011b\u0165 DDR5 a sb\u011brnici PCI-Express 5.0. Celkov\u00e1 architektura nov\u00e9ho j\u00e1dra je bl\u00edzk\u00e1 P550 a tak\u00e9 m\u00e1 modul\u00e1rn\u00ed charakter, co\u017e umo\u017e\u0148uje p\u0159id\u00e1vat do SoC dal\u0161\u00ed bloky se specializovan\u00fdmi akceler\u00e1tory nebo GPU. Podrobnosti budou zve\u0159ejn\u011bny v prosinci, a data RTL p\u0159ipraven\u00e1 k experiment\u016fm na FPGA budou zve\u0159ejn\u011bna v p\u0159\u00ed\u0161t\u00edm roce. <\/p>\n
RISC-V poskytuje otev\u0159en\u00fd a flexibiln\u00ed syst\u00e9m strojov\u00fdch instrukc\u00ed, kter\u00fd umo\u017e\u0148uje vytv\u00e1\u0159et zcela otev\u0159en\u00e9 SoC a mikroprocesory pro r\u016fzn\u00e1 odv\u011btv\u00ed bez nutnosti plateb a bez podm\u00ednek pou\u017eit\u00ed. V sou\u010dasnosti se na z\u00e1klad\u011b specifikace RISC-V vyv\u00edj\u00ed r\u016fzn\u00fdmi spole\u010dnostmi a komunitami pod r\u016fzn\u00fdmi otev\u0159en\u00fdmi licencemi (BSD, MIT, Apache 2.0) 111 variant mikroprocesorov\u00fdch jader, 31 platforem, 12 SoC a 12 hotov\u00fdch produkt\u016f. \n Zdroj: opennet.ru<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"