{"id":77492,"date":"2020-04-10T19:42:45","date_gmt":"2020-04-10T17:42:45","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/poberegis-arm-novye-64-razryadnye-yadra-synopsys-arc-uvelichat-proizvoditelnost-vtroe"},"modified":"2020-04-10T19:42:45","modified_gmt":"2020-04-10T17:42:45","slug":"poberegis-arm-novye-64-razryadnye-yadra-synopsys-arc-uvelichat-proizvoditelnost-vtroe","status":"publish","type":"post","link":"https:\/\/prohoster.info\/da\/blog\/news\/poberegis-arm-novye-64-razryadnye-yadra-synopsys-arc-uvelichat-proizvoditelnost-vtroe","title":{"rendered":"Pas p\u00e5, ARM? De nye 64-bits kerner fra Synopsys ARC vil tredoble ydeevnen","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

F\u00e5 ved, at ARC-processorarkitekturen er en af de mest udbredte arkitekturer sammen med ARM, MIPS og x86. Udviklet i 1980'erne anvendes ARC-arkitekturen i forskellige mikrokontrollere til et bredt spektrum af h\u00f8jteknologiske produkter, og hvert \u00e5r produceres der omkring 1,5 milliarder<\/a><\/noindex> enheder.<\/p>\n

For nylig annoncerede Synopsys en ny generation af 32- og 64-bit ARC-processorkerner, som lover at tredoble ydeevnen sammenlignet med forg\u00e6ngerne, samt muligg\u00f8re opbygning af systemer p\u00e5 chip med 12 kerner. Dermed vil de nye kerner give Synopsys mulighed for at konkurrere med ARM inden for en r\u00e6kke nye omr\u00e5der.<\/p>\n

«Indlejrede applikationer som controllere til solid-state-drev eller netv\u00e6rksudstyr bliver stadig mere komplekse, hvilket kr\u00e6ver en betydelig stigning i ydeevnen ved begr\u00e6nset str\u00f8mforbrug og st\u00f8rrelse», sagde John Koeter, senior vice president for marketing og strategi inden for intellektuel ejendom hos Synopsys. «Med lanceringen af den nye ARCv3-arkitektur og ARC HS5x og HS6x kerner vil udviklere kunne im\u00f8dekomme de voksende krav til ydeevne i deres SoC i dag og i fremtiden».<\/p>\n

\"Pas
\n<\/center><\/p>\n

De nye familier af Synopsys DesignWare ARC-processorer omfatter 32-bit kerner HS56\/HS57D\/HS58<\/a><\/noindex> og 64-bit kerner HS66\/HS68<\/a><\/noindex>. De nyligt annoncerede processorer er designet til en bred vifte af applikationer, s\u00e5som controllere til solid-state-drev (SSD), netv\u00e6rkscontrollere, autopiloter til k\u00f8ret\u00f8jer, infotainmentsystemer til biler og mange andre. I lyset af de voksende krav til hukommelseskapacitet vil 64-bit ARC HD6x muligg\u00f8re oprettelse af systemer med 4,5 PB DRAM, mens enheder baseret p\u00e5 ARC HD5x bliver n\u00f8dt til at begr\u00e6nse sig til mindre kapaciteter. De reelle m\u00e6ngder af underst\u00f8ttet hukommelse vil dog sandsynligvis v\u00e6re dikteret af det anvendte operativsystem, og de synlige fordele ved 64-bit CPU'er vil v\u00e6re en bredere pipeline og en st\u00f8rre registerfil.<\/p>\n

Hvad ang\u00e5r DesignWare ARC HS5x- og DesignWare ARC HS6x-arkitekturerne, underst\u00f8tter de ARCv3-instruktionss\u00e6ttet, som kan udvides med APEX-instruktioner (ARC Processor EXtensions), hvis en af kunderne har brug for specifikke funktioner. Desuden leveres ARC HS57D med en ARCv3DSP digital signalprocessor, der underst\u00f8tter 150 instruktioner. De nye kerner har en dybde af 10 trin i pipeline, kan udf\u00f8re to instruktioner pr. cyklus og er desuden udstyret med en 128-bit flydende kommaenhed. De mest avancerede versioner af kernerne underst\u00f8tter et andet niveau cache (L2) p\u00e5 op til 16 MB.<\/p>\n

\"Pas<\/p>\n

N\u00e5r det kommer til ydeevne, h\u00e6vder Synopsys 3 DMIPS pr. MHz ved heltalsberegninger, samt 5,1 CoreMark pr. MHz, hvilket er meget godt for miniaturekerner med minimalt str\u00f8msforbrug. S\u00e5ledes er 3 DMIPS pr. MHz — h\u00f8jere end for ret kraftfulde processorer, Cortex-A55<\/a><\/noindex>, mens 5,1 CoreMark pr. MHz — er h\u00f8jere end for nogen som helst. ARM mikrocontroller.<\/a><\/noindex><\/p>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
\n

Processor kernerne Synopsys DesignWare ARC HS5x og HS6x
<\/strong><\/p>\n<\/td>\n<\/tr>\n

<\/td>\nHS5x<\/td>\nHS6x<\/td>\n<\/tr>\n
<\/td>\nHS56<\/td>\nHS57D<\/td>\nHS58<\/td>\nHS66<\/td>\nHS68<\/td>\n<\/tr>\n
Instruktionss\u00e6t<\/td>\nARCv3<\/td>\n<\/tr>\n
APEX-instruktioner<\/td>\nUnderst\u00f8ttes<\/td>\n<\/tr>\n
Bitdybde<\/td>\n32-bit<\/td>\n64-bit<\/td>\n<\/tr>\n
Instruktioner pr. cyklus<\/td>\n2<\/td>\n<\/tr>\n
Pipeline l\u00e6ngde<\/td>\n10 trin<\/td>\n<\/tr>\n
DSP<\/td>\n\u2014<\/td>\nARCv3DSP
150 instruktioner<\/td>\n		\u2014<\/td>\n\u2014<\/td>\n\u2014<\/td>\n<\/tr>\n
FPU pr\u00e6cision<\/td>\nFP16, FP32, FP64<\/td>\n<\/tr>\n
Processor cluster<\/td>\n12 kerner<\/td>\n<\/tr>\n
Acceleratorer pr. cluster<\/td>\n16 acceleratorer<\/td>\n<\/tr>\n
L1<\/td>\nInstruktions cache + Data cache<\/td>\n<\/tr>\n
L2<\/td>\n\u2014<\/td>\n\u2014<\/td>\n16 MB<\/td>\n\u2014<\/td>\n16 MB<\/td>\n<\/tr>\n
Maksimalt hukommelsesvolumen<\/td>\n64 GB (afh\u00e6ngig af OS)<\/td>\n4,5 Petabyte<\/td>\n<\/tr>\n
Frekvens (p\u00e5 t\/p 16FFC)<\/td>\n1,8 GHz<\/td>\n<\/tr>\n
DMIPS<\/td>\n5400 DMIPS pr. kerne \/ 3 DMIPS pr. MHz<\/td>\n<\/tr>\n
CoreMark<\/td>\n9180 CoreMark pr. kerne \/ 5,1 CoreMark pr. MHz<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

En af de n\u00f8glefunktioner i den nye familie af DesignWare ARC HS5x og DesignWare ARC HS6x er muligheden for at skabe systemer p\u00e5 chip (system-on-chip, SoC) med 12 generelle processor kerner og 16 specialiserede acceleratorer. Hver kerne\/accelerator i s\u00e5dan en processor arbejder med sin egen taktfrekvens og bruger sit eget str\u00f8mforsyningssystem for at maksimere energieffektiviteten. Sammen med de nye kerner tilbyder Synopsys ogs\u00e5 en intern cache-koherent forbindelse med en datatransmission p\u00e5 800 GB\/s. <\/p>\n

SoC'er af ARC-arkitektur er ikke s\u00e6rlig udbredte i dag, men i betragtning af de lovende processorer til systemer til selvk\u00f8rende biler, datalagring, datastyring, multikernede processorer og forskellige typer acceleratorer, vil de komme godt med. Dette giver Synopsys mulighed for at konkurrere med ARM-kernerne om pladser i SoC'er for de n\u00e6vnte applikationer, hvilket ikke er sket hidtil. For eksempel er producenterne af SSD'er Starblaze allerede interesserede i DesignWare ARC HS5x og DesignWare ARC HS6x-kernerne. <\/p>\n

«Udviklere af h\u00f8jt ydende indlejrede l\u00f8sninger st\u00e5r konstant over for nye udfordringer i jagten p\u00e5 h\u00f8j ydeevne ved brug af store m\u00e6ngder hukommelse samt begr\u00e6nsninger inden for str\u00f8mforbrug og st\u00f8rrelse», sagde Bruce Cheng, chief scientist hos Starblaze. «Mulighederne med de nye 32-bit ARC HS5x og 64-bit HS6x processorer fra Synopsys inden for multikerneteknologi vil give os mulighed for at n\u00e5 et nyt niveau af energieffektivitet, som ikke tilbydes af andre processorer p\u00e5 markedet i \u00f8jeblikket».<\/p>\n

\"Pas<\/p>\n

Synopsys vil begynde at tilbyde ARC HS56, HS57D, HS58, HS66, HS68 kerner samt deres multiprocessor versioner HS56MP, HS57DMP, HS58MP, HS66MP, HS68MP fra tredje kvartal 2020. Derudover vil virksomheden tilbyde ARC MetaWare Development Toolkit til udvikling af chips baseret p\u00e5 de n\u00e6vnte kerner, samt en simulator og verifier til at teste SoC'ers funktionalitet f\u00f8r implementation i silicium. Hvad ang\u00e5r support fra operativsystemer, vil de nye kerner v\u00e6re kompatible med forskellige Linux-distributioner, Zephyr, samt diverse branded OS\u2019er.<\/p>\n

<\/p>\n

<\/center><\/p>\n

\t\t\t\t


\n\t\t\t\t\t\t\t\t<\/center>
Kilde: 3dnews.ru<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"

\u041d\u0435\u043c\u043d\u043e\u0433\u0438\u0435 \u0437\u043d\u0430\u044e\u0442, \u0447\u0442\u043e \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u043e\u0440\u043d\u0430\u044f \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u0430 ARC \u044f\u0432\u043b\u044f\u0435\u0442\u0441\u044f \u043e\u0434\u043d\u043e\u0439 \u0438\u0437 \u0441\u0430\u043c\u044b\u0445 \u0440\u0430\u0441\u043f\u0440\u043e\u0441\u0442\u0440\u0430\u043d\u0435\u043d\u043d\u044b\u0445 \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440 \u043d\u0430\u0440\u044f\u0434\u0443 \u0441 ARM, MIPS \u0438 x86. \u0420\u0430\u0437\u0440\u0430\u0431\u043e\u0442\u0430\u043d\u043d\u0430\u044f \u0432 1980-\u0445 \u0433\u043e\u0434\u0430\u0445, \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u0430 ARC \u043f\u0440\u0438\u043c\u0435\u043d\u044f\u0435\u0442\u0441\u044f \u0432 \u0440\u0430\u0437\u043b\u0438\u0447\u043d\u044b\u0445 \u043c\u0438\u043a\u0440\u043e\u043a\u043e\u043d\u0442\u0440\u043e\u043b\u043b\u0435\u0440\u0430\u0445 \u0434\u043b\u044f \u0448\u0438\u0440\u043e\u0447\u0430\u0439\u0448\u0435\u0433\u043e \u0441\u043f\u0435\u043a\u0442\u0440\u0430 \u0432\u044b\u0441\u043e\u043a\u043e\u0442\u0435\u0445\u043d\u043e\u043b\u043e\u0433\u0438\u0447\u043d\u043e\u0439 \u043f\u0440\u043e\u0434\u0443\u043a\u0446\u0438\u0438, \u0430 \u043a\u0430\u0436\u0434\u044b\u0439 \u0433\u043e\u0434 \u043d\u0430 \u043e\u0441\u043d\u043e\u0432\u0435 ARC \u043f\u0440\u043e\u0438\u0437\u0432\u043e\u0434\u0438\u0442\u0441\u044f \u043e\u043a\u043e\u043b\u043e 1,5 \u043c\u0438\u043b\u043b\u0438\u0430\u0440\u0434\u0430 \u0443\u0441\u0442\u0440\u043e\u0439\u0441\u0442\u0432. \u041d\u0430 \u0434\u043d\u044f\u0445 \u043a\u043e\u0440\u043f\u043e\u0440\u0430\u0446\u0438\u044f Synopsys \u0430\u043d\u043e\u043d\u0441\u0438\u0440\u043e\u0432\u0430\u043b\u0430 \u043d\u043e\u0432\u043e\u0435 \u043f\u043e\u043a\u043e\u043b\u0435\u043d\u0438\u0435 32- \u0438 64-\u0440\u0430\u0437\u0440\u044f\u0434\u043d\u044b\u0445 \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u043e\u0440\u043d\u044b\u0445 […]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":77493,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[702],"tags":[],"class_list":["post-77492","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news"],"aioseo_notices":[],"aioseo_head":"\n\t\t\n\t\n\t\n\t\n\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\n","aioseo_head_json":{"title":"\ud83e\udd47Pas p\u00e5, ARM? De nye 64-bit kerner fra Synopsys ARC vil tredoble ydeevnen | ProHoster","description":"F\u00e5 ved, at ARC-processorkarakteristikken er en af de mest udbredte arkitekturer sammen med ARM, MIPS og x86.","canonical_url":"https:\/\/prohoster.info\/da\/blog\/news\/poberegis-arm-novye-64-razryadnye-yadra-synopsys-arc-uvelichat-proizvoditelnost-vtroe","robots":"max-image-preview:large","keywords":"","webmasterTools":{"miscellaneous":""},"schema":null,"og:locale":"da_DK","og:site_name":"ProHoster | \u041a\u0443\u043f\u0438\u0442\u044c \u043d\u0430\u0434\u0435\u0436\u043d\u044b\u0439 \u0445\u043e\u0441\u0442\u0438\u043d\u0433 \u0434\u043b\u044f \u0441\u0430\u0439\u0442\u043e\u0432 \u0441 \u0437\u0430\u0449\u0438\u0442\u043e\u0439 \u043e\u0442 DDoS, VPS VDS \u0441\u0435\u0440\u0432\u0435\u0440\u044b","og:type":"article","og:title":"\ud83e\udd47\u041f\u043e\u0431\u0435\u0440\u0435\u0433\u0438\u0441\u044c, ARM? \u041d\u043e\u0432\u044b\u0435 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