Das Mikro-Kernel seL4 wurde mathematisch für die RISC-V-Architektur verifiziert.
The RISC-V Foundation has announced the verification of the seL4 microkernel running on systems with RISC-V instruction set architecture. The verification consists of a mathematical proof of the reliability of seL4, which indicates full compliance with the specifications defined in the formal language. The proof of reliability allows seL4 to be used in critical systems based on RISC-V RV64 processors, which require a high level of reliability and ensure the absence of […]
