{"id":101076,"date":"2021-08-23T16:22:46","date_gmt":"2021-08-23T14:22:47","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/prodemonstrirovan-zapusk-linux-okruzheniya-s-gnome-na-ustrojstvah-s-chipom-apple-m1"},"modified":"2021-08-23T16:22:46","modified_gmt":"2021-08-23T14:22:47","slug":"prodemonstrirovan-zapusk-linux-okruzheniya-s-gnome-na-ustrojstvah-s-chipom-apple-m1","status":"publish","type":"post","link":"https:\/\/prohoster.info\/de\/blog\/news\/prodemonstrirovan-zapusk-linux-okruzheniya-s-gnome-na-ustrojstvah-s-chipom-apple-m1","title":{"rendered":"Es wurde der Start der Linux-Umgebung mit GNOME auf Ger\u00e4ten mit dem Apple M1-Chip demonstriert.","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

Die Initiative zur Unterst\u00fctzung des Apple M1-Chips in Linux, gef\u00f6rdert von den Projekten Asahi Linux und Corellium, hat ein Niveau erreicht, bei dem der GNOME-Desktop in einer Linux-Umgebung, die auf einem System mit dem Apple M1-Chip l\u00e4uft, gestartet werden kann. Die Ausgabe auf den Bildschirm erfolgt \u00fcber einen Framebuffer, und die Unterst\u00fctzung von OpenGL wird durch den Software-Rasterizer LLVMPipe sichergestellt. Der n\u00e4chste Schritt wird die Nutzung des Display-Co-Prozessors zur Ausgabe in bis zu 4K-Aufl\u00f6sung sein, f\u00fcr den bereits ein Reverse Engineering der Treiber durchgef\u00fchrt wurde. <\/p>\n

Das Asahi-Projekt hat die anf\u00e4ngliche Unterst\u00fctzung der SoC M1-Komponenten, die nicht mit der GPU verbunden sind, in den Hauptbestandteil des Linux-Kernels integriert. In der demonstrierten Linux-Umgebung wurden neben den Funktionen des Standardkerns mehrere zus\u00e4tzliche Patches verwendet, die sich auf PCIe, den pinctrl-Treiber f\u00fcr den internen Bus und den Display-Treiber beziehen. Diese Erg\u00e4nzungen erm\u00f6glichten die Ausgabe auf den Bildschirm sowie den Betrieb von USB und Ethernet. Eine Beschleunigung der Grafik wird derzeit noch nicht verwendet. <\/p>\n

Interessanterweise hat das Asahi-Projekt zur R\u00fcckentwicklung des SoC M1 anstelle von Versuchen, die Treiber von macOS zu disassemblieren, einen Hypervisor implementiert, der auf einer Ebene zwischen macOS und dem M1-Chip ausgef\u00fchrt wird und im transparenten Modus alle Operationen mit dem Chip abf\u00e4ngt und protokolliert. Zu den Besonderheiten des SoC M1, die die Implementierung der Unterst\u00fctzung f\u00fcr den Chip in Drittanbieter-Betriebssystemen erschweren, geh\u00f6rt die Integration eines Co-Prozessors in den Display-Controller (DCP). Auf die Seite dieses Co-Prozessors wurde die H\u00e4lfte der Funktionalit\u00e4t des macOS-Displaytreibers verlagert, der \u00fcber eine spezielle RPC-Schnittstelle auf die fertigen Funktionen des Co-Prozessors zugreift. <\/p>\n

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\"Es<\/center>
\"Es<\/center>
\n
Quelle: opennet.ru<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"

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