SiFive, founded by the creators of the RISC-V instruction set architecture and responsible for developing the first prototype processor based on RISC-V, has unveiled a new RISC-V CPU core in its SiFive Performance line that is 50% faster than the previous top core, the P550, and outperforms the ARM Cortex-A78, the most powerful ARM-based processor. SoCs based on the new core are primarily targeted at server systems and workstations, but there may also be scaled-down versions for mobile and embedded devices.
It has been stated that compared to the P550, the new SiFive CPU core features 16 MB of L3 cache instead of 4 MB, can incorporate up to 16 cores in one chip instead of 4, operates at frequencies of up to 3.5 GHz instead of 2.4 GHz, supports DDR5 memory, and uses PCI-Express 5.0. The overall architecture of the new core is similar to the P550 and also has a modular nature, allowing for additional blocks with specialized accelerators or GPUs to be added to the SoC. More details are expected to be released in December, with RTL data ready for experimentation on FPGA to be published next year.
RISC-V offers an open and flexible instruction set architecture, enabling the creation of fully open SoCs and microprocessors for various applications without requiring royalties or imposing conditions on usage. Currently, based on the RISC-V specification, various companies and communities are developing 111 microprocessor core variants, 31 platforms, 12 SoCs, and 12 ready-made boards under different open licenses (BSD, MIT, Apache 2.0).
Source: opennet.ru
