The release of the QEMU 7.1 project has been announced. As an emulator, QEMU allows you to run software compiled for one hardware platform on a system with a completely different architecture, for example, running an ARM application on an x86-compatible PC. In virtualization mode, QEMU's code execution performance in an isolated environment is close to that of a physical system due to direct execution of instructions on the CPU and involvement of the Xen hypervisor or KVM module.
The project was initially created by Fabrice Bellard to enable the execution of Linux binaries compiled for the x86 platform on architectures other than x86. Over the years, full emulation support has been added for 14 hardware architectures, and the number of emulated hardware devices has surpassed 400. More than 2,800 changes from 238 developers have been made in preparation for version 7.1.
Key improvements added in QEMU 7.1:
- On the Linux platform, the zero-copy-send option has been implemented, allowing memory page transfers during live migration without intermediate buffering.
- In QMP (QEMU Machine Protocol), the command block-export-add has been added for exporting NBD images with data about pages in a 'dirty' state. New commands ‘query-stats’ and ‘query-stats-schema’ have also been added for querying statistics from various QEMU subsystems.
- The guest systems agent has improved support for the Solaris platform and added new commands ‘guest-get-diskstats’ and ‘guest-get-cpustats’ to display disk and CPU status. The ‘guest-get-disks’ command now includes output from NVMe SMART, and the ‘guest-get-fsinfo’ command outputs data about the NVMe bus type.
- A new emulator for LoongArch has been added, supporting the 64-bit variant of the LoongArch instruction set architecture (LA64). The emulator supports Loongson 3 5000 processors and Loongson 7A1000 northbridges.
- The ARM emulator has implemented new types of emulated machines: Aspeed AST1030 SoC, Qualcomm, and AST2600 / AST1030 (fby35). Support for emulation of Cortex-A76 and Neoverse-N1 CPUs has been added, as well as processor extensions SME (Scalable Matrix Extensions), RAS (Reliability, Availability, Serviceability) and instructions for blocking leaks from the internal cache during speculative instruction execution on the CPU. The emulated ‘virt’ machines now feature emulation of the GICv4 interrupt controller.
- In the x86 architecture emulator for KVM Support for the Last Branch Record (LBR) tracing mechanism virtualization has been added.
- The HPPA architecture emulator has introduced a new firmware based on SeaBIOS v6, supporting the use of PS/2 keyboards in the boot menu. Serial port emulation has been improved. Additional STI console fonts have been added.
- The MIPS architecture emulator for Nios2 boards (-machine 10m50-ghrd) has implemented the emulation of a Vectored Interrupt Controller and shadow register set. Exception handling has been enhanced.
- The OpenRISC architecture emulator for the 'or1k-sim' machine now supports the use of up to 4 16550A UART devices.
- The RISC-V architecture emulator has added support for new Instruction Set Architecture (ISA) extensions defined in specification 1.12.0, as well as support for the Sdtrig extension and improved vector instruction support. Debugging capabilities have been expanded. Support for TPM (Trusted Platform Module) has been added to the emulated 'virt' machine, along with Ibex SPI support to the 'OpenTitan' machine.
- The 390x architecture emulator now supports VEF 2 (Vector-Enhancements Facility 2) extensions. The s390-ccw BIOS has implemented the ability to boot from disks that have sector sizes different from 512 bytes.
- The Xtensa architecture emulator has added support for lx106 cores and object codes for cache testing.
Source: opennet.ru
