The developers of the FFmpeg project announced the implementation of new assembly optimizations that leverage the AVX-512 instruction set to accelerate certain operations used in video decoding. The performance boost of the assembly code using AVX-512 instructions was 94, 44, 64, and 4.24 times compared to the baseline implementation written in C without using SIMD instructions. In assembly code optimized with AVX-2 instructions, the gain was 67, 27, 55, and 4.38 times, respectively, while using SSSE3 instructions, the increases were 40, 21, 29, and 2.49 times. These changes have been added to the dav1d library, which provides an alternative decoder for the AV1 video encoding format. AVX-512 instructions are available in AMD processors based on the Zen 4 and 5 microarchitectures, and in Intel processors based on microarchitectures such as Skylake-X, Ice Lake, Tiger Lake, and Rocket Lake.
Source: opennet.ru
