The release of the CoreBoot project 26.06 has been published, developing a free alternative to proprietary firmware and BIOS. The project's code is distributed under the GPLv2 license. The new version includes 1163 changes, prepared with the participation of 101 developers, of which 22 participated in the development for the first time.
Key Changes:
- Support for 31 motherboards has been implemented:
- AMD Crater for SoC V2000A
- AMD Jaguar for SoC Faegan
- AMD Maple for SoC Strix Halo
- ASRock H370M-ITX/ac, ASRock Z87 Extreme6
- ASUS H81M-K, P8H61-I R2.0, P8H61-M LX2, PRIME H610M-K D4, Z87-K
- ASUS Maximus VI EXTREME
- ASUS Maximus VI FORMULA, VI HERO, VII IMPACT, VI IMPACT, VII RANGER
- Framework Laptop 13 (Intel Core Ultra Series 1)
- Framework Laptop 13 Pro (Intel Core Ultra Series 3)
- Lenovo ThinkPad X61 / X61s
- Star Labs Byte Mk I (Ryzen 7 5800U), StarBook Mk VI (Ryzen 7 5800U)
- System76 bonw15-b, gaze20
- 8 boards used in various devices with Chrome OS or on servers Google.
- Support for AMD Crater Renoir motherboards has been discontinued (replaced with AMD Crater for SoC V2000A) and Google Myst.
- Initial support for Intel Nova Lake (NVL) SoC has been added. Implemented bootblock, romstage, ramstage, FSP-M, and FSP-S (Firmware Support Package), added GPIO pin definitions and ACPI tables, PCIe, and Flash support. Updated utilities ifdtool and spd_tools. Limitations — DDR5 is not yet supported.
- Initial support for Intel Panther Lake (PTL) SoC has been added with inline UFS encryption capabilities.
- Initial support for AMD Strix Halo SoC has been added with a demonstration of booting on the AMD Maple motherboard.
- Initial support for Qualcomm Calypso SoC and motherboards based on this SoC, Google Calypso, Mensa, and C1nv, has been added. Support for ARM Trusted Firmware, PCIe, QUPv3 timer initialization, SPMI driver, and booting CPUCP and PDP firmware is available.
- Support for the ROM Armor mechanism has been added for AMD chips, providing protection against unauthorized modification of the system SPI Flash.
- Support for the A/B Recovery mechanism has been implemented for AMD chips, ensuring a backup is saved during firmware updates to load the old firmware in case of failure to boot from the new version or verification integrity issues. Added the ability to boot from a second Flash chip and retain the recovery flag between reboots. The utilities amdfwtool and amdfwread now support directory splitting and parsing A/B partitions.
- For platforms using Qualcomm chips, such as Google Bluey and Calypso, enhanced battery and power management features have been implemented. This includes: a smooth transition from slow to fast charging, temperature monitoring, a no-battery boot mode, and optimized power delivery to NVMe.
- Support for devices based on Intel Haswell and Broadwell chips has been extended. The support code for Haswell and Broadwell platforms has been unified, and a common graphics initialization has been implemented. Preliminary support for Broadwell chip variants for PCs has been added. A driver for artificially reducing voltage (undervolt) is included, and power limits PL1/PL2 have been redefined. Support for ASUS motherboards on Haswell chips, such as Maximus VI/VII, Z87-K, and H81M-K, has been added.
- The Intel FSP 2.0 driver now includes support for the Zstd compression algorithm.
- The ability to enable multiple logo images with different resolutions has been provided to display them based on screen resolution.
- Work continues on adapting the code to support the C23 standard.
- Versions GCC 15.2.0, NASM 3.01, binutils 2.45.1, and ACPICA 20251212 have been updated.
Source: opennet.ru
