According to information shared by Intel's Senior Vice President of Technology and System Architecture, Jim Keller, his company is currently working on a fundamentally new microarchitecture that is expected to be "significantly larger and closer to a linear performance scaling with the number of transistors" than the current Sunny Cove design. This suggests that in a few years, we will see a processor that is significantly more complex and capable than the CPUs currently offered by the microprocessor giant.
The new Sunny Cove microarchitecture used by Intel in its latest Ice Lake processors marks a significant breakthrough, as it has notably improved the IPC (instructions per clock) after a fairly long hiatus. However, processor guru Jim Keller, currently employed by Intel, states that this is far from the final milestone. He is now working on the next generation of microarchitecture that will fully exploit the expected substantial increase in transistor budget over the next few years.
According to Intel's estimates, the Sunny Cove cores outperform Coffee Lake cores in terms of specific performance by 15–18% (at the same clock frequency). However, the transistor budget for Sunny Cove exceeds that of its predecessor by a much larger margin—around 38%. As Keller revealed, a core based on the Sunny Cove microarchitecture comprises approximately 300 million 10-nm transistors, while a Coffee Lake core contains about 217 million 14-nm transistors. Thus, the performance growth in Sunny Cove does not align with the linear expectations of transistor budget scaling: the performance progress turned out to be roughly half of the increase in semiconductor die complexity. Keller believes this should not be the case.
While giving a lecture at Berkeley University, a leading specialist from Intel addressed the evolution of Intel processor microarchitectures and mentioned the possible successor to Sunny Cove, stating, "Sunny Cove works with 800 instructions simultaneously, executing between 3 to 6 x86 instructions per cycle... It features massive data predictors and massive branch predictors. But we are working on a new generation of microarchitecture that is significantly larger, with performance growth that is closer to linear. This is indeed a significant change in thinking."
The star engineer's position is that processor manufacturing is still far from reaching any limits. As Keller explains, Intel has ambitious plans for the future, including a 50-fold increase in the number of transistors in processors and significant improvements in almost every functional block. And this is not impossible. As Keller explains: "Computers are created by a vast number of people, but in reality, it is a large number of small teams. You can improve branch prediction, instruction set, architecture, engage in optimization, use more advanced design tools, and better libraries. The number of different application points where there is room for innovation is indeed very, very large."
Intel's current public plans include two iterations of microarchitecture improvement following Sunny Cove. In the upcoming Willow Cove design, changes to the cache subsystem and a shift to a new semiconductor technology (likely 7 nm) are promised. Then, in Golden Cove, single-thread performance will be enhanced with a focus on AI task performance along with optimizations necessary for better performance in fifth-generation networks. In his report, Jim Keller may have been referring to Golden Cove, although nothing specific was mentioned on this matter.
Source: 3dnews.ru
