A photo - β CC BY
On PWC, the semiconductor technology market is growing - last year it reached $481 billion. But the rate of its growth in recent . Among the reasons for the decline are the complexity of device design processes and the lack of automation.
A few years ago, engineers from Intel that when creating a high-performance microprocessor, you have to use 100β150 separate software tools (). The situation can be aggravated in the case of heterogeneous devices, the architecture of which includes several different types of chips - ASIC, FPGA, CPU or GPU. As a result, design errors occur that delay the release of products.
Despite the large number of auxiliary tools, engineers still have to do some of the work manually. The authors of the bookΒ» say that sometimes designers write scripts in Skill or Python of two million lines to form libraries with .
Scripts are also written for parsing reports generated by EDA systems. When developing a chip on a 22nm process, these reports can take up to 30 terabytes.
DARPA decided to correct the situation and try to standardize the design processes. The agency too that existing methods for creating chips are outdated. Organization five-year program , the purpose of which is to develop new tools for automating the processes of designing microcircuits.
What is the program
The program involves several projects that use machine learning and cloud technologies to automate individual stages of chip creation. As part of the initiative (diagram 1) more than ten instruments. Next, we will talk in more detail about some of them: Flow Runner, RePlAce, TritonCTS, OpenSTA.
Flow Runner is a tool for managing RTL and GDSII libraries. The latter are database files that are the industry standard for exchanging information about integrated circuits and their layouts. The solution is based on Docker container technology. You can run Flow Runner both in the cloud and locally. The installation guide is in the official repository .
RePlace is a cloud-based machine learning solution that is responsible for placing components on a chip and automating the routing. By , intelligent algorithms increase tool efficiency by 2-10% compared to classical systems. In addition, implementation in the cloud simplifies scaling. Installation and configuration guide is also .
TritonCTS - a utility for optimizing the clock pulses supplied to the chip. Helps to route clock signals to all parts of the device with the same delays. The operating principle is based on . This approach 30% signal distribution efficiency compared to traditional methods. The developers say that in the future this figure can be increased to 56%. TritonCTS source code and scripts are available .
OpenSTA β engine for static time analysis. It gives the designer the opportunity to test the functionality of the chip before it is actually assembled. Example code in OpenSTA that's it.
@@ -6,7 +6,7 @@ read_liberty -corner ff example1_fast.lib
read_verilog example1.v
link_design top
set_timing_derate -early 0.9
set_timing_derate -early 1.1
set_timing_derate -late 1.1
create_clock -name clk -period 10 {clk1 clk2 clk3}
set_input_delay -clock clk 0 {in1 in2}
# report all corners
The utility supports netlist descriptions of Verilog code, libraries in Liberty format, SDC files, etc.
Advantages and disadvantages
Experts from IBM and IEEE that cloud technologies and machine learning are long overdue for chip manufacturing. In their opinion, the DARPA project can be a good example of the implementation of this idea and the beginning of changes in the industry.
It is also expected that the open nature of OpenROAD will create a powerful community around the tools and attract new startups.
A photo - β CC BY
There are already participants - a laboratory engaged in the development of chips based on the University of Michigan, who will test the open tools of OpenROAD. But it is not yet known whether the new solutions will be able to have a noticeable effect on the cost of final products.
In general, the tools developed under the leadership of DARPA are expected to have a positive impact on the processor industry, and more and more new projects will begin to appear in this area. An example would be a tool - it allows you to design chips with an unlimited number of components. gEDA includes utilities for editing and modeling chips and tracing boards. The solution was developed for UNIX platforms, but a number of its components also work under Windows. A guide to working with them can be found .
Open source tools give independent organizations and startups more options. It is possible that over time, OpenROAD's new approaches to EDA tool development and chip design may become the industry standard.
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Source: habr.com