- In the future, almost all Intel products will use the spatial architecture Foveros, with its active implementation starting within the 10nm process.
- The second generation of Foveros will be utilized by the first 7nm Intel graphics processors, which will find applications in the server segment.
- At the investor event, Intel clarified the five layers that the Lakefield processor will consist of.
- For the first time, forecasts on the performance levels of these processors have been published.
Intel first discussed the advanced architecture of hybrid processors Lakefield back of this year, but yesterday's investor event was used by the company to integrate the approaches used in creating these processors into the overall development concept for the corporation in the coming years. At least, the spatial architecture Foveros was mentioned in various contexts at yesterday's event — it will be used, for example, by the first 7nm discrete graphics processor brand that will find applications in the server segment in 2021.
Within the 10nm process, Intel will use the first generation of 3D Foveros architecture, while 7nm products will transition to the second generation of Foveros architecture. By 2021, in addition to this, the EMIB substrate will evolve to its third generation, which Intel has already tested on its programmable matrices and unique Kaby Lake-G mobile processors that combine Intel's compute cores with a discrete AMD Radeon RX Vega M graphics chip. Accordingly, the Foveros architecture of the Lakefield mobile processors discussed below still belongs to the first generation.
Lakefield: five layers of perfection
At the event the head of engineering direction Venkata Renduchintala, whom Intel finds it appropriate to refer to by the nickname 'Murthy' in all official documents, spoke about the main architectural layers of future Lakefield processors, which allowed for a slightly broader understanding of such products compared to the January presentation.
The entire packaging of the Lakefield processor measures 12 x 12 x 1 mm, enabling the creation of very compact motherboards suitable for placement not only in ultra-thin laptops, tablets, and various types of convertible devices but also in powerful smartphones.
The second layer consists of a basic component manufactured using 22nm technology. It integrates elements of the system logic chipset, 1MB of L3 cache, and a power subsystem.
The third layer is named after the entire packaging concept — Foveros. This matrix of scalable three-dimensional interconnections allows for efficient data exchange between multiple tiers of silicon chips. Compared to the 2.5D layout based on a silicon bridge, Foveros offers two to three times the bandwidth. This interface has low specific energy consumption but enables the creation of products with power levels ranging from 3W to 1kW. Intel promises that the technology is at a maturity stage where the yield of usable products is quite high.
The fourth layer houses 10nm components: four energy-efficient Atom-type cores with Tremont architecture and one large core with Sunny Cove architecture, as well as a Gen11 graphics subsystem with 64 execution units, which the Lakefield processors share with mobile 10nm counterparts from Ice Lake. This layer also contains some components that enhance the thermal conductivity of the entire multi-layer system.
Finally, at the top of this 'sandwich' are four LPDDR4 memory chips with a total capacity of 8GB. Their mounting height does not exceed one millimeter from the base, making the entire 'tier' quite airy, at no more than two millimeters.
Initial data on configuration and some specifications Lakefield
In the footnotes to its May press release, Intel mentions the results of a comparison between a hypothetical Lakefield processor and a mobile dual-core 14nm processor from the Amber Lake generation. The comparison was based on simulation and modeling, so it cannot be claimed that Intel already has engineering samples of the Lakefield processors. In January, Intel representatives explained that the 10nm Ice Lake processors would be the first to hit the market. Today it was revealed that shipments of these processors for laptops will begin in June, and the slides in the Lakefield presentation also referred to the product list for 2019. Thus, we can expect the debut of mobile computers based on Lakefield by the end of this year, but the lack of engineering samples as of April is somewhat concerning.
Let's return to the configuration of the compared processors. In this case, Lakefield had five cores without support for multithreading, with a TDP parameter that could take two values: five or seven watts, respectively. Coupled with the processor should be LPDDR4-4267 memory with a total volume of 8 GB, configured in dual-channel mode (2 × 4 GB). The Amber Lake processors were represented by the Core i7-8500Y model with two cores and Hyper-Threading, with a TDP level not exceeding 5 watts and frequencies of 3.6/4.2 GHz.
If we are to believe Intel's statements, the Lakefield processor provides, in comparison to Amber Lake, a twofold reduction in motherboard area, a twofold decrease in power consumption in active mode, a twofold increase in graphics subsystem performance, as well as a tenfold reduction in power consumption in standby mode. The comparison was conducted using GfxBENCH and SYSmark 2014 SE, so it does not claim objectivity, but it was sufficient for the presentation.
Source: 3dnews.ru
