The CHERIoT 1.0 software-hardware platform for enhancing code security in the C language
The final version of the CHERIoT 1.0 specification (Capability Hardware Extension to RISC-V for Internet of Things) has been presented, defining the extension of the instruction set architecture (ISA) for creating secure devices. CHERIoT provides hardware capabilities for tracking memory access, validating pointer operations, and ensuring code block isolation. At the same time, a stable release of the reference formal model CHERIoT ISA has been published, defined […]
