The release of the CoreBoot project on 25.03 has been announced, developing a free alternative to proprietary firmware and BIOS. The project's code is distributed under the GPLv2 license. The new version includes 1001 changes. A total of 131 developers participated in the release preparation.
Key Changes:
- Support for motherboards has been implemented:
- ASROCK Z87 Extreme3, Z87 Extreme4, Z87M Extreme4, and Z87 Pro4.
- ASUS P8H67-I DELUXE
- HP Pro 3400
- Intel Ptlrvp
- Lenovo ThinkCentre M900
- NovaCustom V540TU (14") and V560TU (16").
- StarLabs StarLite Mk V Smart Battery (N200), StarBook Mk VII (165H), and StarLabs StarBook Mk VII (N200).
- 8 boards used in various devices with Chrome OS or in servers Google.
- Support for the SoC Renoir (AMD Crater) and Xilinx Zynq7000 has been added.
- Support for rotating the logo for display in portrait orientation on the screen panel has been added. The option to return the orientation to its original value when the laptop lid is closed is ensured for correct logo display when an external screen is connected.
- Support for the new 'lsusb -t' output format has been added, which changed in usbutils 016.
- The code for displaying battery low notifications during boot has been removed from the FSP (Firmware Support Package).
- The emergency shutdown of FSP-S on systems with Intel Meteor Lake processors has been eliminated.
- For the Intel Cannon Lake platform, standard ACPI code for SRAM and HECI (Host Embedded Controller Interface) has been engaged.
- Improved the open implementation of the memory initialization system for the Intel Haswell platform.
- Improved the intelp2m utility (Intel Pad to Macro).
- Work has been done on different platforms to improve power consumption and temperature management.
- Improved support for displays and graphics cards.
- Improved support for USB Type-C and Thunderbolt interfaces.
- Added processing for low battery charge and the power button press at the initial stage of booting.
- Improved initialization code for memory. Support for additional memory configurations has been added.
- Expanded support for ACPI and device handling.
- Improved support for TPM chips (Trusted Platform Module) and embedded controllers (EC, Embedded Controller).
- Support for new models of touchpads and input devices has been added.
- Enhanced support for the RISC-V architecture.
- Expanded debugging and logging capabilities.
- Improved error handling and recovery from failures.
- Support for DDR5 chips providing a data transfer rate of 7500 MT/s has been added.
Source: opennet.ru
