The release of the GNU Binutils 2.43 system utilities package has been published, which includes programs such as the GNU linker, GNU assembler, nm, objdump, strings, and strip.
In the new version:
- Support for the '.base64' directive has been added in the GNU assembler for representing binary data as base64 encoded strings. The ability to use the '\+' syntax in macros and within directives .irp, .irpc, and .rept for defining the number of macro invocations has been implemented.
- Support has been added for the CFCMOV, NF, CCMP, and CTEST instructions defined in the Intel APX instruction set.
- Support has been added for the 'armv9.5-a' architecture, as well as the LUT and LUTv2 extensions (AArch64 Lookup Table Extension).
- Support has been added for RISC-V extensions: XSfCease, Zacas, Zcmp, Zfbfmin, Zvfbfmin, Zvfbfwma, Smcsrind, Sscsrind, XCvMem, XCvBi, and XCvElw.
- The linker has added options: '--rosegment' (when using the '-z separate-code' option, creates one read-only segment instead of two), '--section-ordering-file ' (mapping input and output sections), and '--plugin-save-temps' (saving temporary files from plugins). Support for the DT_RELR (relocation) address relocation packaging format has been implemented for AArch64 and LoongArch architectures, allowing for a reduction in the size of information about relative relocations in shared objects and executables.
- The readelf utility now shows details about address relocation (DT_RELR). An option '-j' ('--display-section') has been added to display the contents of the section specified by name or index. When displaying the contents of the '.eh_frame' section, it also shows the '.eh_frame_hdr' section if present.
- Initial support for the RISC-V architecture has been added in the gprofng utility. The code for handling hardware event counters has been revamped. Events specific to AMD ZEN3, AMD ZEN4, and Intel Ice Lake processors, as well as standard events for ARM processors, have been implemented.
Source: opennet.ru
