SiFive, founded by the creators of the RISC-V instruction set architecture and at one time prepared the first prototype of a processor based on RISC-V, introduced a new RISC-V CPU core in the SiFive Performance line, which is 50% faster than the previous top P550 core and outperforms ARM Cortex-A78, the most powerful processor based on the ARM architecture. SoCs based on the new core are primarily focused on server systems and workstations, but it is also possible to create stripped-down options for mobile and embedded devices.
It is stated that, compared to the P550, the new SiFive processor core contains 16 MB of L3 cache instead of 4 MB, can combine up to 16 cores instead of 4 in one chip, operates at up to 3.5 GHz instead of 2.4 GHz, supports DDR5 memory and the PCI-Express 5.0 bus . The overall architecture of the new core is close to the P550 and also has a modular nature, allowing you to add additional blocks to the SoC with specialized accelerators or GPUs. Details are scheduled to be published in December, and RTL data ready for FPGA experiments will be published next year.
RISC-V provides an open and flexible machine instruction system that allows you to create completely open SoCs and microprocessors for arbitrary applications, without requiring royalties or imposing conditions on use. Currently, based on the RISC-V specification, various companies and communities under various free licenses (BSD, MIT, Apache 2.0) are developing 111 microprocessor core variants, 31 platforms, 12 SoCs and 12 ready-made boards.
Source: opennet.ru