- In the future, almost all Intel products will use the Foveros spatial layout, its active implementation will begin within the 10-nm process technology.
- The second generation of Foveros will be used by the first 7nm Intel GPUs to find their way into the server segment.
- At an investor event, Intel clarified the five tiers of the Lakefield processor.
- For the first time published forecasts for the level of performance of these processors.
For the first time, Intel talked about the advanced layout of Lakefield APUs more this year, but the company used yesterday's event for investors to integrate the approaches used to create these processors into the overall concept of the corporation's development in the coming years. At least Foveros' spatial layout was mentioned at yesterday's event in a variety of contexts - it will be used, for example, by the brand's first 7nm discrete GPU, which will find application in the server segment in 2021.
As part of the 10nm process technology, Intel will use the first generation Foveros 7D layout, while 2021nm products will move to the second generation Foveros layout. By XNUMX, in addition, the EMIB substrate, which Intel has already managed to test on its programmable matrices and unique Kaby Lake-G mobile processors, combining Intel computing cores with a discrete AMD Radeon RX Vega M graphics solution chip, will evolve to the third generation. Below, the Foveros layout of Lakefield mobile processors dates back to the first generation.
Lakefield: five layers of perfection
At the event Venkata Renduchintala, who Intel considers appropriate to call the nickname “Murthy” in all official documents, who leads the direction of engineering development, spoke about the main layout tiers of future Lakefield processors, which allowed us to slightly expand the idea of \uXNUMXb\uXNUMXbsuch products compared to the January presentation .
The entire packaging of the Lakefield processor has overall dimensions of 12 x 12 x 1 mm, which allows you to create very compact motherboards suitable for placement not only in ultra-thin laptops, tablets and various convertible devices, but also in high-performance smartphones.
The second tier is followed by the base component manufactured using 22nm technology. It combines elements of a system logic set, a 1 MB LXNUMX cache, and a power subsystem.
The third layer was given the name of the entire layout concept - Foveros. It is a matrix of scalable 2.5D interconnects that allows for the efficient exchange of information between multiple tiers of silicon chips. Compared to the 3D silicon bridge layout, the throughput of Foveros is doubled or tripled. This interface has a low specific power consumption, but allows you to create products with power consumption levels from 1 W to XNUMX kW. Intel promises that the technology is in a stage of maturity where yields are very high.
On the fourth tier, there are 10nm components: four economical Atom cores with Tremont architecture and one large core with Sunny Cove architecture, as well as a Gen11 generation graphics subsystem with 64 execution cores, which Lakefield processors will share with Ice Lake mobile 10nm relatives. On the same tier, there are some components that improve the thermal conductivity of the entire multi-tiered system.
Finally, at the top of this "sandwich" are four LPDDR4 memory chips with a total capacity of 8 GB. Their mounting height from the base does not exceed one millimeter, so that the entire “whatnot” turned out to be very openwork, no more than two millimeters.
The first data on the configuration and some characteristics Lakefield
In the footnotes to its May press release, Intel mentions the results of comparing the conventional Lakefield processor with the mobile 14nm dual-core processor of the Amber Lake generation. The comparison was based on simulations and simulations, so it cannot be said that Intel already has engineering samples of Lakefield processors. In January, Intel clarified that 10nm Ice Lake processors would be the first to hit the market. Today it became known that the shipments of these processors for laptops will begin in June, and on the slides in the presentation, Lakefield also belonged to the list of products in 2019. Thus, we can count on the debut of Lakefield-based mobile computers before the end of this year, but the lack of engineering samples as of April is somewhat alarming.
Let's return to the configuration of the compared processors. Lakefield in this case had five cores without multithreading support, the TDP parameter could take two values: five or seven watts, respectively. In conjunction with the processor, LPDDR4-4267 memory with a total volume of 8 GB, configured in a dual-channel version (2 × 4 GB), should work. Amber Lake processors were represented by a Core i7-8500Y model with two cores and Hyper-Threading with a TDP level of no more than 5 W and frequencies of 3,6 / 4,2 GHz.
Compared to Amber Lake, the Lakefield processor delivers 2014x the motherboard footprint, XNUMXx the active power, XNUMXx the graphics performance, and XNUMXx the idle power, according to Intel. The comparison was carried out in GfxBENCH and SYSmark XNUMX SE, so it does not pretend to be objective, but this turned out to be enough for the presentation.
Source: 3dnews.ru