The struggle for the client forces contract manufacturers of semiconductors to become closer to designers. One option to allow customers around the world to take advantage of certified EDA tools with all the latest changes is to deploy services in public clouds. The other day, the success of this approach was demonstrated by the service for checking the topology of chip design, deployed on the Microsoft Azure platform by TSMC. The solution is based on the Caliber nmDRC software of the former Mentor Graphics, in April 2017 by the German Siemens.
ΠΠ°ΠΊ in AMD, full check of the (physical) topology in the history of the company, the 7nm GPU Vega 20 with 13,2 billion transistors to comply with the project was completed in just 10 hours. The second pass took another hour less. Two passes in 19 hours of verification in the cloud is an excellent result, AMD is confident. This proves the success of this approach and opens up new opportunities for designers: new products will be able to appear on the market faster and with better implementation.
It is interesting to note that the AMD Vega 20 GPU was tested on a remote platform on AMD EPYC 7000 series processors. Caliber nmDRC software was deployed on 4410 cores or 69 virtual machines (with the highest bandwidth of the memory subsystem). For such a massive work with memory, like checking the topology of the processor, this is extremely important.
The developers of the Caliber nmDRC software also contributed to the success of the enterprise. The updated software requires 50% less memory for the same topology verification tasks. The AMD EPYC platform delivers 33% more bandwidth than Intel's offerings, the company says. In particular, in Azure, the memory subsystem runs at speeds up to 263 GB/s, and HB-class virtual machines provide 80% more bandwidth than competing cloud platforms.
Source: 3dnews.ru