With a fresh press release from Samsung Electronics that it has started mass production of 3D NAND with over 100 layers. The maximum possible configuration allows the release of chips with 136 layers, which marks a new milestone on the road to denser 3D NAND flash memory. The lack of a clear memory configuration hints that a chip with more than 100 layers is assembled from two or, most likely, three monolithic 3D NAND crystals (for example, from 48-layer ones). In the process of soldering crystals, some of the boundary layers are destroyed, and this makes it impossible to accurately indicate the number of layers in a crystal so that Samsung is not later accused of inaccuracy.
Nevertheless, Samsung insists on a unique channel hole etching, which opens up the possibility to pierce through the thickness of a monolithic structure and connect horizontal flash memory arrays into a single memory chip. The first 100-layer products were 3D NAND TLC chips with a capacity of 256-Gbps. Chips with a volume of 512-Gbps with 100 (+) layers, the company will begin to produce in the coming autumn.
The refusal to release more capacious memory is dictated by the fact (probably) that the level of defects in the release of the latest products is easier to control in the case of memory of a smaller capacity. By “increasing the number of floors”, Samsung was able to produce a smaller chip area without losing capacity. Moreover, the chip has become somewhat simpler, since now, instead of 930 million vertical holes in a monolith, it is enough to etch only 670 million holes. According to Samsung, this has simplified and shortened production cycles and allowed for a 20% increase in labor productivity, which means more and cheaper.
Based on 100-layer memory, Samsung launched a 256 GB SATA SSD. Products will be supplied to PC OEMs. There is no doubt that Samsung will soon introduce reliable and relatively inexpensive solid state drives.
The transition to a 100-layer structure did not make us sacrifice performance and power consumption. The new 256Gb 3D NAND TLC is 10% faster overall than 96-layer memory. The improved design of the control electronics of the chip made it possible to keep the data transfer rate in the write mode below 450 µs, and in the read mode below 45 µs. At the same time, consumption was reduced by 15%. The most interesting thing is that based on the 100-layer 3D NAND, the company promises to release the next 300-layer 3D NAND, simply by joining three conditionally monolithic 100-layer crystals. If Samsung can mass-produce 300-layer 3D NAND next year, it will be a painful kick to competitors and flash memory industry.
Source: 3dnews.ru