TSMC: Going from 7nm to 5nm Increases Transistor Density by 80%

TSMC this week already announced development of a new stage of lithographic technologies, which received the symbol N6. The press release said that this stage of lithography will be brought to the stage of risk production by the first quarter of 2020, but only the transcript of the quarterly report conference of TSMC revealed new details about the timing of the development of the so-called 6nm technology.

It should be recalled that TSMC already mass-produces a wide range of 7nm products - in the past quarter, they formed 22% of the company's revenue. TSMC management forecasts that N7 and N7+ process technology will account for at least 25% of revenue this year. The second generation of the 7nm process technology (N7+) implies a wider use of ultra-hard ultraviolet (EUV) lithography. At the same time, as TSMC representatives emphasize, it was the experience gained during the implementation of the N7 + process technology that allowed the company to offer customers the N6 process technology, which completely repeats the N7 design ecosystem. This allows developers to switch from N7 or N7+ to N6 in the shortest possible time and with minimal material costs. CEO Xi Xi Wei (CC Wei) even expressed confidence at the quarterly conference that all TSMC customers using the 7nm process will switch to using the 6nm technology. Earlier, in a similar context, he mentioned the readiness of “almost all” users of TSMC's 7nm process to migrate to the 5nm process.

TSMC: Going from 7nm to 5nm Increases Transistor Density by 80%

It would be appropriate to explain what advantages the 5nm process technology (N5) provides in the performance of TSMC. As Xi Xi Wei admitted, N5 will be one of the most "long-playing" in the history of the company in terms of life cycle duration. At the same time, from the point of view of the developer, it will differ significantly from the 6-nm process technology, so the transition to the 5-nm design norm will require significant efforts. For example, if a 6nm process provides an 7% increase in transistor density compared to a 18nm process, then the difference between 7nm and 5nm will be as high as 80%. On the other hand, the increase in the speed of transistors in this case will not exceed 15%, so the thesis about the slowdown of the "Moore's law" in this case is confirmed.

TSMC: Going from 7nm to 5nm Increases Transistor Density by 80%

All this does not prevent the head of TSMC from claiming that the N5 process technology will be “the most competitive in the industry.” With its help, the company expects not only to increase its market share in existing segments, but also to attract new customers. In the context of mastering the 5-nm process technology, special hopes are placed on the segment of solutions for high-performance computing (HPC). Now it accounts for no more than 29% of TSMC's revenue, and 47% of revenue comes from components for smartphones. Over time, the share of the HPC segment will have to increase, although the developers of processors for smartphones will be willing to master the new lithographic standards. The development of 5G generation networks will also become one of the reasons for revenue growth in the coming years, according to the company.


TSMC: Going from 7nm to 5nm Increases Transistor Density by 80%

Finally, TSMC's CEO confirmed the start of mass production using the N7+ process technology using EUV lithography. The yield level of this process technology is comparable to the 7nm technology of the first generation. The introduction of EUV, according to Xi Xi Wei, cannot provide an immediate economic return - as long as the costs are high enough, but as soon as production "gains momentum", the cost of production will begin to decline at a pace typical of recent years.



Source: 3dnews.ru

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