The Institute of Computer Technology of the Chinese Academy of Sciences presented the XiangShan project, which has been developing a high-performance open processor based on the RISC-V (RV2020GC) instruction set architecture since 64. The developments of the project are open under the permissive license MulanPSL 2.0.
The project published a description of hardware blocks in the Chisel language, which is translated into Verilog, a reference implementation based on FPGA and images for simulating the operation of the chip in the open Verilog simulator Verilator. Diagrams and architecture descriptions are also available (more than 400 documents and 50 thousand lines of code in total), but most of the documentation is in Chinese. The reference operating system used to test the FPGA implementation is Debian GNU/Linux.
XiangShan claims to be the highest performance RISC-V chip outperforming the SiFive P550. This month, it is planned to complete testing on the basis of FPGA and release under the code name "Yanqi Lake" an 8-core prototype chip, running at a frequency of 1.3 GHz and manufactured by TSMC using the 28nm process technology. The chip includes a 2MB cache, a memory controller with support for DDR4 memory (up to 32GB of RAM) and a PCIe-3.0-x4 interface.
The performance of the first chip in the SPEC2006 test is estimated at 7/Ghz, which corresponds to the ARM Cortex-A72 and Cortex-A73 chips. By the end of the year, production of the second South Lake prototype with an improved architecture is scheduled, which will be transferred to SMIC with a 14nm process technology and an increase in frequency to 2 GHz. The second prototype is expected to perform at 2006/Ghz in the SPEC10 test, which is close to ARM Cortex-A76 and Intel Core i9-10900K processors, and outperforms SiFive P550, the fastest RISC-V CPU with 8.65/Ghz performance.
Recall that RISC-V provides an open and flexible system of machine instructions that allows you to create microprocessors for arbitrary applications, without requiring royalties and without imposing conditions on use. RISC-V allows the creation of completely open SoCs and processors. Currently, based on the RISC-V specification, various companies and communities under various free licenses (BSD, MIT, Apache 2.0) are developing several dozen variants of microprocessor cores, SoCs, and already manufactured chips. Of the operating systems with high-quality support for RISC-V, Linux (present since the releases of Glibc 2.27, binutils 2.30, gcc 7 and the Linux 4.15 kernel) and FreeBSD can be noted.
Source: opennet.ru