Coreboot 4.12 release

Published project release Core Boot 4.12, which is developing a free alternative to proprietary firmware and BIOS. 190 developers took part in the creation of the new version, who prepared 2692 changes.

All innovations:

  • Added support for 49 motherboards, most of which are used on Chrome OS devices. Removed support for 51 motherboards. The removal is mainly about removing support for obsolete boards and working to eliminate duplicates of similar board options. Many boards that were previously presented as separate models are combined into sets (variant), in which one module covers the entire family of devices at once. Taking into account the cleaning of duplicates, despite the fact that formally the number of removed boards exceeds the number of added ones, the list of supported equipment has increased. The new release also includes a large number of changes to improve support for devices that ship with OEM ROMs, including those based on Coreboot.
  • Code base cleaning continued. Bulky license notes in file headers replaced with short identifiers SPDX. The names of all authors who participated in the development are collected in the AUTHORS file. The header files have been revised to minimize the code covered during the assembly of each assembly unit.
  • Driver for flash drives SMMSTORE considered ready for widespread use. The driver uses SMM (system management mode) to write, read and clear areas on flash memory, and can be used in the OS or firmware components to store settings permanently, without the need to implement a platform-specific driver.
  • Unit-testing tools have been expanded, which are integrated with the new build system and transferred to the use of the Cmocka framework. A separate tests/ directory has been created in the source tree for unit tests.
  • Components now required for x86 systems include RELOCATABLE_RAMSTAGE, POSTCAR_STAGE, and C_ENVIRONMENT_BOOTBLOCK. RELOCATABLE_RAMSTAGE allows you to relocate at run time ramstage to another area of ​​memory that does not overlap with the memory of the OS or payload handlers (relocation is necessary because ramstage is cached in CBMEM for faster loading when exiting standby). POSTCAR_STAGE is used to transition from CAR (Cache-As-Ram) to running code from DRAM. C_ENVIRONMENT_BOOTBLOCK allows you to use a bootblock built with regular GCC rather than the specialized romcc compiler.
  • Removed code from the main codebase to support AMDFAM10, VIA VX900 and FSP1.0 platforms (BROADWELL_DE, FSP_BAYTRAIL, RANGELEY), which do not meet the new requirements. For example, in FSP1.0 it is not possible to implement the POSTCAR stage.

Source: opennet.ru

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