The release of the CoreBoot 4.16 project has been published, within which a free alternative to proprietary firmware and BIOS is being developed. The project code is distributed under the GPLv2 license. 170 developers took part in the creation of the new version, who prepared 1770 changes.
Main innovations:
- Added support for 33 motherboards, 22 of which are used on Chrome OS devices or Google servers. Among non-Google boards:
- Acer Aspire VN7-572G
- amd chausie
- ASROCK H77 Pro4-M
- ASUS P8Z77-M
- Emulation QEMU power9
- Intel Alderlake-N RVP
- Prodrive Atlas
- Star Labs Star Labs StarBook Mk V (i3-1115G4 and i7-1165G7)
- System76 gaze16 3050, 3060 and 3060-b
- Support for Google Corsola, Nasher and Stryke motherboards has been discontinued.
- Added support for Power9 CPU and AMD Sabrina SoC.
- Added an option to disable the IME (Intel Management Engine) subsystem, which comes on most modern motherboards with Intel processors and is implemented as a separate microprocessor that operates independently of the CPU and performs tasks that need to be separated from the operating system, such as processing protected content ( DRM), implementation of TPM (Trusted Platform Module) modules and low-level interfaces for monitoring and controlling equipment. To disable IME in systems with processors from the Skylake family to Alder Lake, the me_state parameter is used in CMOS, assigning a value of 1 to which will disable the engine. To change the CSME state via CMOS, the β.enableβ method has been added, the state of which corresponds to the me_state parameter.
- Added coreboot-configurator, a simple GUI for changing CMOS settings in Coreboot CBFS using the nvramtool utility.
- Added the apcb_v3_edit utility for editing APCB V3 (AMD PSP Customization Block) binary files and substituting up to 16 SPD (Serial Presence Detect) in them.
- Updated submodules amd_blobs, arm-trusted-firmware, blobs, chromeec, intel-microcode, qc_blobs and vboot.
- The code for configuring LAPIC (Local Advanced Programmable Interrupt Controller) has been moved to MP init.
- Added support for ANSI escape sequences to highlight important events, such as errors and warnings, when displaying logs in the interactive console.
- Implemented cbmem_dump_console function, similar to cbmem_dump_console_to_uart, but works with commonly configured consoles.
- Live image settings are adapted to work with the NixOS 21.11 distribution. The iasl package has been discontinued and has been replaced by acpica-tools.
- U-Boot bootloader has been updated to version 2021.10.
- Added support for systems with more than 128 CPU cores.
- Added driver for Semtech sx9360 SAR proximity sensors used in Samsung devices.
- Added driver for SGenesys Logic GL9750 SD controllers used in Chromebooks.
- Added support for Realtek RT8125 Ethernet controllers.
- Added driver for Fibocom 5G WWAN ACPI.
- Added support for mixed memory topologies when using DDR4.
- Added support for FSP 2.3 (Flexible Software Package) specification.
- The code for calculating hashes used in verification and evaluation of the CBFS state has been reworked
- Added support for PCI-e Resizable BAR (Base Address Registers) technology, which allows the CPU to access the entire video memory of the PCI card.
In addition, a transition plan is presented starting from release 4.18 to the fourth edition of the resource allocation mechanism (RESOURCE_ALLOCATOR_V4), which adds support for manipulating multiple resource ranges, using the entire address space, and memory allocation in areas above 4 GB. Coreboot 4.18, expected in November, also plans to deprecate the classic multiprocessor initialization mechanism (LEGACY_SMP_INIT), replacing it with the PARALLEL_MP initialization code.
Source: opennet.ru