The release of the QEMU 7.1 project is presented. As an emulator, QEMU allows you to run a program built for one hardware platform on a system with a completely different architecture, for example, run an ARM application on an x86-compatible PC. In the virtualization mode in QEMU, the performance of code execution in an isolated environment is close to a hardware system due to the direct execution of instructions on the CPU and the use of the Xen hypervisor or KVM module.
The project was originally created by Fabrice Bellard to allow Linux executables built for the x86 platform to run on non-x86 architectures. Over the years of development, full emulation support has been added for 14 hardware architectures, the number of emulated hardware devices has exceeded 400. In preparation for version 7.1, more than 2800 changes have been made from 238 developers.
Key improvements added in QEMU 7.1:
- On the Linux platform, the zero-copy-send option is implemented, which allows organizing the transfer of memory pages during live migration without intermediate buffering.
- QMP (QEMU Machine Protocol) adds the ability to use the block-export-add command to export NBD images with page data in the "dirty" state. Also added new commands 'query-stats' and 'query-stats-schema' to query statistics from various QEMU subsystems.
- The guest agent has improved support for the Solaris platform and added new commands 'guest-get-diskstats' and 'guest-get-cpustats' to display disk and CPU status. Added output of information from NVMe SMART to the 'guest-get-disks' command, and output of information about the NVMe bus type to the 'guest-get-fsinfo' command.
- A new LoongArch emulator has been added to support the 64-bit version of the LoongArch (LA64) instruction set architecture. The emulator supports Loongson 3 5000 processors and Loongson 7A1000 northbridges.
- The ARM emulator has implemented new types of emulated machines: Aspeed AST1030 SoC, Qaulcomm and AST2600/AST1030 (fby35). Added support for Cortex-A76 and Neoverse-N1 CPU emulation, as well as SME (Scalable Matrix Extensions), RAS (Reliability, Availability, Serviceability) processor extensions, and commands to block internal cache leaks during speculative instruction execution on the CPU. Implemented GICv4 interrupt controller emulation for 'virt' machines.
- The x86 emulator for KVM has added support for LBR (Last Branch Record) tracing mechanism virtualization.
- The HPPA architecture emulator offers a new firmware based on SeaBIOS v6 that supports the use of a PS/2 keyboard in the boot menu. Improved serial port emulation. Added additional STI console fonts.
- The MIPS architecture emulator for Nios2 boards (-machine 10m50-ghrd) implements emulation of the Vectored Interrupt Controller and the shadow register set. Improved exception handling.
- Added the ability to use up to 1 4A UART devices in the OpenRISC architecture emulator for the 'or16550k-sim' machine.
- The RISC-V architecture emulator has added support for the new instruction set extensions (ISA) defined in the 1.12.0 specification, as well as added support for the Sdtrig extension and improved support for vector instructions. Improved debugging options. TPM (Trusted Platform Module) support has been added to the 'virt' emulated machine, and Ibex SPI support has been added to the 'OpenTitan' machine.
- The 390x architecture emulator provides support for VEF 2 (Vector-Enhancements Facility 2) extensions. The s390-ccw BIOS has the ability to boot from disks with a sector size other than 512 bytes.
- Support for lx106 kernels and object codes for cache testing has been added to the Xtensa architecture emulator.
Source: opennet.ru