{"id":102418,"date":"2021-11-29T15:36:38","date_gmt":"2021-11-29T13:36:39","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/intel-razvivaet-novuyu-otkrytuyu-arhitekturu-proshivok-universal-scalable-firmware"},"modified":"2021-11-29T15:36:38","modified_gmt":"2021-11-29T13:36:39","slug":"intel-razvivaet-novuyu-otkrytuyu-arhitekturu-proshivok-universal-scalable-firmware","status":"publish","type":"post","link":"https:\/\/prohoster.info\/en\/blog\/news\/intel-razvivaet-novuyu-otkrytuyu-arhitekturu-proshivok-universal-scalable-firmware","title":{"rendered":"Intel is advancing a new open architecture for Universal Scalable Firmware.","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"
Intel is developing a new architecture for Universal Scalable Firmware (USF), aimed at simplifying the development of all components of the firmware software stack for various device categories, from servers to systems on chip (SoC). USF provides levels of abstraction that separate low-level hardware initialization logic from platform components responsible for configuration, firmware updates, security, and operating system booting. A draft specification and implementation of typical elements of the USF architecture are available on GitHub. <\/p>\n
USF has a modular structure that is not tied to specific solutions, allowing the use of various existing projects that implement hardware initialization and booting stages, such as the UEFI TianoCore EDK2 stack, the minimalist Slim Bootloader firmware, the U-Boot bootloader, and the CoreBoot platform. Payload environments used for locating the bootloader and transferring control to the operating system can include the UEFI interface, the LinuxBoot layer (for direct Linux kernel boot), VaultBoot (verified boot), and the ACRN hypervisor. Standard interfaces like ACPI, UEFI, Kexec, and Multi-boot are provided for operating systems. <\/p>\n
USF features a dedicated layer for hardware support (FSP, Firmware Support Package), which interacts with a universal and customizable platform orchestration layer (POL, Platform Orchestration Layer) through a common API. FSP abstracts operations such as CPU reset, hardware initialization, System Management Mode (SMM) operations, and SoC-level authentication and verification. The orchestration layer simplifies the creation of ACPI interfaces, supports standard bootloader libraries, allows the use of the Rust programming language for developing secure firmware components, and enables configuration through the YAML markup language. At the POL level, attestation (authentication confirmation), authentication, and the organization of secure updates installation are also performed.
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The new architecture is expected to enable: <\/p>\n
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Reduce the complexity and cost of firmware development for new devices by reusing code from existing standard components, using a modular architecture that is not tied to specific bootloaders, and enabling a universal API for module configuration.\n
Increase the quality and security of firmware by employing verifiable modules for hardware interaction and a more secure infrastructure for authenticity checking and firmware verification.\n
Utilize different bootloaders and payload components depending on the tasks at hand.\n
Accelerating the promotion of new technologies and shortening the development cycle \u2014 developers can focus only on adding specific functionalities while using proven components for everything else.\n
Scale firmware development for various mixed computing architectures (XPU), including those that incorporate, in addition to CPU, built-in discrete graphics accelerators (dPGU) and programmable network devices to speed up network operations in data centers that support cloud systems (IPU, Infrastructure Processing Unit). <\/ul>\n
![\"Intel](\"\/wp-content\/uploads\/2021\/11\/45e4802b1c10b8c0877936db8c4c7186.jpg\")
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