{"id":104303,"date":"2022-06-06T21:36:59","date_gmt":"2022-06-06T19:37:00","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/google-predostavil-vozmozhnost-besplatnogo-proizvodstva-probnyh-partij-otkrytyh-chipov"},"modified":"2022-06-06T21:36:59","modified_gmt":"2022-06-06T19:37:00","slug":"google-predostavil-vozmozhnost-besplatnogo-proizvodstva-probnyh-partij-otkrytyh-chipov","status":"publish","type":"post","link":"https:\/\/prohoster.info\/en\/blog\/news\/google-predostavil-vozmozhnost-besplatnogo-proizvodstva-probnyh-partij-otkrytyh-chipov","title":{"rendered":"Google has provided the opportunity for free production of trial runs of open chips","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"
Google, in collaboration with manufacturing companies SkyWater Technology and Efabless, has launched an initiative that allows open hardware developers to manufacture their developed chips for free. The initiative aims to stimulate the development of open hardware, reduce costs in open project development, and simplify interactions with manufacturing plants. Thanks to this initiative, anyone can start developing their own custom chips without fearing high costs for producing initial prototypes. All expenses for production, packaging, and delivery are covered by Google. <\/p>\n
Applications for inclusion in the free production program can be submitted every two months. The next slot will close on June 8, and the chips that make it in will be ready by August 30 and sent to the authors on October 18. 40 projects will be selected from the submitted applications (if there are fewer than 40 submissions, all that pass the correctness check will be put into production). As a result of the production, the developer will receive 50 chips and 5 boards with installed chips. <\/p>\n
Applications are only accepted from projects that are fully distributed under open licenses, free from non-disclosure agreements (NDA), and not restricting the scope of use of their products. Manufacturing data must be provided in GDSII format, pass the provided test suite, and be reproducible from source design files (i.e., you cannot declare an open project and submit a proprietary layout for production). <\/p>\n
To simplify the development of open chips, the following open tools are offered: <\/p>\n
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SkyWater PDK (Process Design Kit), a toolkit that describes the manufacturing process used at SkyWater for 130nm (SKY130) and allows the preparation of the necessary design files for chip production.\n
OpenLane is a set of components for automated conversion of RTL designs for specialized chips (ASICs) into the GDSII format used by factories for manufacturing semiconductors.
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XLS (Accelerated HW Synthesis) is a toolkit for synthesizing design files with hardware functionality that corresponds to the provided high-level description of the required functionality, formatted in a software development style.\n
A set of rules for the Bazel build system with support for open tools (Yosys, Verilator, OpenROAD) for working with hardware description languages (Verilog, VHDL, Chisel, nMigen).\n
OpenROAD is a framework for automating the development process of open semiconductors.\n
Verible is a suite of tools for development in the Verilog language, including a parser, style formatting system, and linter. <\/ul>\n
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