{"id":104811,"date":"2022-08-11T03:36:41","date_gmt":"2022-08-11T01:36:41","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/aepic-leak-ataka-privodyashhaya-k-utechke-klyuchej-iz-anklavov-intel-sgx"},"modified":"2022-08-11T03:36:41","modified_gmt":"2022-08-11T01:36:41","slug":"aepic-leak-ataka-privodyashhaya-k-utechke-klyuchej-iz-anklavov-intel-sgx","status":"publish","type":"post","link":"https:\/\/prohoster.info\/en\/blog\/news\/aepic-leak-ataka-privodyashhaya-k-utechke-klyuchej-iz-anklavov-intel-sgx","title":{"rendered":"AEPIC Leak \u2014 an attack that leads to key leakage from Intel SGX enclaves","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"
Details have been revealed about a new attack on Intel processors \u2014 AEPIC Leak (CVE-2022-21233), which leads to the leakage of confidential data from isolated enclaves in Intel SGX (Software Guard eXtensions). The issue affects Intel CPUs of the 10th, 11th, and 12th generations (including the new Ice Lake and Alder Lake series) and is caused by a design flaw that allows access to uninitialized data remaining in the APIC (Advanced Programmable Interrupt Controller) registers after previous operations. <\/p>\n
Unlike Spectre-class attacks, the leak in AEPIC Leak occurs without the use of side-channel recovery methods \u2014 information about confidential data is transmitted directly by accessing the contents of registers reflected in the MMIO (memory-mapped I\/O) memory page. In general, the attack allows for the determination of data transmitted between second and last level caches, including the contents of registers and results of memory read operations that were previously handled on the same CPU core. <\/p>\n
Since executing the attack requires access to the physical APIC MMIO pages, i.e., administrator privileges are necessary, the method is limited to attacks on SGX enclaves, which the administrator does not have direct access to. Researchers have developed a toolkit that can determine the AES-NI and RSA keys stored in SGX, as well as Intel SGX attestation keys and pseudorandom number generator parameters, within seconds. The code for conducting the attack has been published on GitHub. <\/p>\n
Intel has announced the preparation of a fix in the form of a microcode update that implements support for buffer cleaning and adds additional measures to protect enclave data. A new release of the Intel SGX SDK has also been prepared with changes to prevent data leaks. It is recommended that OS and hypervisor developers use the x2APIC mode instead of the outdated xAPIC mode, in which MSR registers are used to access the APIC registers instead of MMIO. \n Source: opennet.ru<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"