{"id":113206,"date":"2024-01-28T18:50:35","date_gmt":"2024-01-28T16:50:35","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/kompaniya-amd-otkryla-kod-drajvera-dlya-npu-na-baze-arhitektury-xdna"},"modified":"2024-01-28T18:50:35","modified_gmt":"2024-01-28T16:50:35","slug":"kompaniya-amd-otkryla-kod-drajvera-dlya-npu-na-baze-arhitektury-xdna","status":"publish","type":"post","link":"https:\/\/prohoster.info\/en\/blog\/news\/kompaniya-amd-otkryla-kod-drajvera-dlya-npu-na-baze-arhitektury-xdna","title":{"rendered":"AMD has opened the driver code for the NPU based on the XDNA architecture.","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"
AMD has released the source code for drivers for cards powered by the XDNA architecture, which provides tools for accelerating computations related to machine learning and signal processing (NPU, Neural Processing Unit). The XDNA-based NPU is included in the AMD Ryzen 7040 and 8040 processor series, AMD Alveo V70 accelerators, and AMD Versal SoCs. The code is written in C and C++ and is open under the GPLv2 license. A Linux kernel 6.7 with IOMMU SVA (Shared Virtual Addressing) support is required for the driver to function. <\/p>\n
The published code includes a driver for the Linux kernel (amdxdna.ko) and a runtime library (plugin «xrt_plugin*-amdxdna») for using the XRT (Xilinx Runtime Library) interface, which allows applications to access handlers (kernel) running on the hardware accelerator side. XRT enables the utilization of the AMD NPU in applications using standard programming languages. Various levels of abstraction are provided, from low-level APIs for C\/C++ to high-level bindings for Python and components for integration with TensorFlow, PyTorch, and Caffe. \n Source: opennet.ru<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"