{"id":116935,"date":"2024-07-04T15:05:10","date_gmt":"2024-07-04T13:05:10","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/indirector-novaya-mikroarhitekturnaya-ataka-zatragivayushhaya-cpu-intel-raptor-lake-i-alder-lake"},"modified":"2024-07-04T15:05:10","modified_gmt":"2024-07-04T13:05:10","slug":"indirector-novaya-mikroarhitekturnaya-ataka-zatragivayushhaya-cpu-intel-raptor-lake-i-alder-lake","status":"publish","type":"post","link":"https:\/\/prohoster.info\/en\/blog\/news\/indirector-novaya-mikroarhitekturnaya-ataka-zatragivayushhaya-cpu-intel-raptor-lake-i-alder-lake","title":{"rendered":"Indirector \u2014 a new microarchitectural attack affecting Intel Raptor Lake and Alder Lake CPUs.","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"
Researchers from the University of California, San Diego have introduced a new method to attack the microarchitectural structures of Intel processors, applicable among others to CPUs based on the Raptor Lake and Alder Lake microarchitectures. The attack, codenamed Indirector, allows changes to the flow of speculative execution of instructions in other processes and at different privilege levels (for example, in the kernel or another virtual machine) running in the same CPU thread as the attacker's code. A prototype exploit has been developed to demonstrate the method, enabling the determination of memory address layouts to bypass the ASLR (Address Space Layout Randomization) protection mechanism. Additionally, under the MIT license, a toolkit has been released for analyzing and reverse engineering the CPU\u2019s microarchitectural logic. <\/p>\n
Two methods for organizing the attack have been proposed. The first method is based on distorting the contents of the IBP (Indirect Branch Predictor) buffer, used for predicting indirect branches when the address or offset for branching is still unknown and calculated in instructions preceding the branch instruction. The second method concerns the BTB (Branch Target Buffer), which contains information on recent branches.<\/p>\n
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The identified vulnerabilities allow the attacker to determine the contents of records in the IBP and BTB buffers, which contain addresses of branches used in external processes, as well as to substitute an arbitrary branch address in the data tables of the buffers. As a result, the attacker can redirect the execution flow of an external process to a desired memory address during speculative instruction execution. Once the incorrect prediction is determined, the result of speculative execution will be discarded, but the addresses and data read from memory during speculative execution will remain in the cache, and they can be extracted using one of the methods for determining the cache contents based on analyzing the change in access time to cached and non-cached data. The determination of exact indirect branch addresses can, for example, be used to bypass the ASLR protection mechanism. \n Source: opennet.ru<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"
![\"Indirector](\"\/wp-content\/uploads\/2024\/07\/3cc65dbc13023032e14498018b4210b2.png\")
<\/center><\/p>\n![\"Indirector](\"\/wp-content\/uploads\/2024\/07\/ba20b77307e49d00a90eec113f2e63fd.png\")
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