{"id":181694,"date":"2026-05-24T00:25:20","date_gmt":"2026-05-23T22:25:21","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/vypolneno-dizassemblirovaniya-mikrokoda-i386-i-sozdan-otkrytyj-cpu-z386"},"modified":"2026-05-24T00:25:20","modified_gmt":"2026-05-23T22:25:21","slug":"vypolneno-dizassemblirovaniya-mikrokoda-i386-i-sozdan-otkrytyj-cpu-z386","status":"publish","type":"post","link":"https:\/\/prohoster.info\/en\/blog\/news\/vypolneno-dizassemblirovaniya-mikrokoda-i386-i-sozdan-otkrytyj-cpu-z386","title":{"rendered":"Decompilation of i386 microcode completed and open CPU z386 created","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"
Enthusiasts successfully extracted and disassembled the microcode of the Intel 80386 processor, which was considered a 'black box' due to a lack of documentation. The binary image of the microcode was recreated using AI based on high-resolution photographs of the chip, and the logic was analyzed through tracing connections on the chip. Gradually, the structure of micro-operations (\u03bc-ops), fields, execution order, and instruction end markers were identified. The project findings have been published on GitHub as public domain.<\/p>\n
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It was discovered that in the 80386 CPU, each instruction is fully executed via microcode, whereas in the 8086 and modern processors, part of the instructions is handled directly. Additionally, unlike the 8086 processors, in the 80386, the microcode does not directly implement algorithms but primarily configures hardware accelerators (multiplier, divider, fast shifter, PTU (Protection Test Unit)). <\/p>\n
The research also revealed a potential security issue in handling the I\/O permission bitmap: when accessing ports with a 4-byte operation, the access rights were only checked for the first 3 bytes, and access to the 4th byte was not verified, theoretically allowing access to hardware registers that should have been restricted.<\/p>\n
Based on the published microcode, an open CPU z386 has been developed, implemented in SystemVerilog and running on FPGA. Instead of implementing each instruction as a separate RTL (Register-transfer level) component, the z386 uses hardware structures managed by the original microcode. The performance of the prepared implementation corresponds to a fast 386 PC (~70MHz). Under the z386, it was possible to successfully run DOS 6\/7, DOS\/4GW, DOS\/32A, and games such as Doom and Cannon Fodder. \n Source: opennet.ru<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"
![\"Decompilation](\"\/wp-content\/uploads\/2026\/05\/1e1b93d95556ace5c8005ca7e006abf2.jpg\")
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