{"id":34408,"date":"2019-10-31T21:58:10","date_gmt":"2019-10-31T18:58:10","guid":{"rendered":"https:\/\/prohoster.info\/blog\/obsuzhdenie-proekt-openroad-namerevaetsya-reshit-zadachu-avtomatizatsii-proektirovaniya-protsessorov\/"},"modified":"2019-10-31T21:58:10","modified_gmt":"2019-10-31T18:58:10","slug":"obsuzhdenie-proekt-openroad-namerevaetsya-reshit-zadachu-avtomatizatsii-proektirovaniya-protsessorov","status":"publish","type":"post","link":"https:\/\/prohoster.info\/en\/blog\/administrirovanie\/obsuzhdenie-proekt-openroad-namerevaetsya-reshit-zadachu-avtomatizatsii-proektirovaniya-protsessorov","title":{"rendered":"Discussion: The OpenROAD project aims to tackle the challenge of automating processor design","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

\"Discussion:<\/a><\/noindex>
\nPhoto - Pexels<\/a><\/noindex> \u2014 CC BY<\/i><\/p>\n

According to data<\/a><\/noindex> PWC, the semiconductor technology market is growing \u2014 last year it reached a milestone of $481 billion. However, its growth rate has recently slowed down<\/a><\/noindex>. Among the reasons for the decline are the complexity of the device design processes and the lack of automation.
\n<\/a><\/noindex>
\nA few years ago, engineers from Intel reported<\/noindex>, noted that creating a high-performance microprocessor requires the use of 100-150 separate software tools (EDA<\/a><\/noindex>). The situation can worsen in the case of heterogeneous devices, whose architecture includes several different types of chips \u2014 ASIC, FPGA, CPU, or GPU. As a result, design errors occur, delaying product releases.<\/p>\n

Despite the large number of auxiliary tools, engineers are still forced to perform some tasks manually. The authors of the book \u201cAdvanced Logic Synthesis<\/a><\/noindex>\u201d state that sometimes designers account for<\/a><\/noindex> have to write scripts in Skill or Python from two million lines to form libraries with cells<\/a><\/noindex>.<\/p>\n

. Scripts are also written for parsing reports generated by EDA systems. During the development of a chip using 22 nm technology, these reports can amount to up to 30 terabytes.<\/i><\/p><\/blockquote>\n

\nTo rectify the situation and try to standardize design processes, DARPA decided to intervene. The agency also believe<\/a><\/noindex>, noted that existing methods for creating chips are outdated. The organization launched<\/a><\/noindex> has launched a five-year program OpenROAD<\/a><\/noindex>, aimed at developing new tools for automating the chip design processes.<\/p>\n

What is the program<\/h2>\n

\nThe program involves several projects that utilize machine learning and cloud technologies to automate individual stages of chip creation. As part of the initiative are developed<\/a><\/noindex> (scheme 1), more than ten tools are involved. Below we will detail some of them: Flow Runner, RePlAce, TritonCTS, OpenSTA.<\/p>\n

Flow Runner<\/b> is a tool for managing RTL and GDSII libraries. The latter are database files that serve as an industry standard for exchanging information about integrated circuits and their topologies. The solution is based on Docker container technology. Flow Runner can be run both in the cloud environment and locally. The installation guide is available in the official repository on GitHub<\/a><\/noindex>.<\/p>\n

RePlAce<\/b> \u2014 a cloud solution based on machine learning that is responsible for placing components on the chip and automating routing. According to some data<\/noindex>, intelligent algorithms increase the tool's efficiency by 2\u201310% compared to classic systems. Moreover, implementation in the cloud simplifies scaling. The installation and setup guide is also available in the repository<\/a><\/noindex>.<\/p>\n

TritonCTS<\/b> \u2014 a utility for optimizing clock pulses sent to the chip. It helps route synchronization signals to all parts of the device with equal delays. The principle of operation is based on H-trees<\/a><\/noindex>. This approach increases<\/a><\/noindex> the efficiency of signal distribution by 30% compared to traditional methods. Developers say that in the future this figure can be increased to 56%. The source code and scripts for TritonCTS are available on GitHub<\/a><\/noindex>.<\/p>\n

OpenSTA<\/b> \u2014 a static timing analysis engine. It allows the developer to verify the chip's functionality even before its actual assembly. A code example in OpenSTA looks<\/a><\/noindex> looks like this.<\/p>\n

@@ -6,7 +6,7 @@ read_liberty -corner ff example1_fast.lib\nread_verilog example1.v\nlink_design top\nset_timing_derate -early 0.9\nset_timing_derate -early 1.1\nset_timing_derate -late 1.1\ncreate_clock -name clk -period 10 {clk1 clk2 clk3}\nset_input_delay -clock clk 0 {in1 in2}\n# report all corners\n<\/code><\/pre>\n
\nThe utility supports netlist descriptions in Verilog code, libraries in Liberty format, SDC files, and more.<\/p>\n
Advantages and Disadvantages<\/h2>\n
\nExperts from IBM and IEEE note<\/a><\/noindex>, state that cloud technologies and machine learning should be used in chip manufacturing. In their opinion, the DARPA project could be a successful example of implementing this idea and will lay<\/a><\/noindex> the groundwork for changes in the industry.<\/p>\n
It is also expected that the open nature of OpenROAD will help create a powerful community around its tools and attract new startups.<\/p>\n
\"Discussion:
\nPhoto - Pexels<\/noindex> \u2014 CC BY<\/i><\/p>\n
There are already participants \u2014 a laboratory working on chip development based at the University of Michigan, who will be the first<\/a><\/noindex>to test the OpenROAD open tools. However, it remains unclear whether the new solutions will significantly impact the cost of end products.<\/p>\n
Overall, it is expected that the tools developed under DARPA's guidance will positively influence the processor industry, leading to more new projects in this field. An example could be the tool gEDA<\/a><\/noindex> It allows designing chips with an unlimited number of components. gEDA includes utilities for editing and modeling circuits and routing boards. The solution was developed for UNIX platforms, but several of its components also work on Windows. The user manual can be found in the documentation on the project website<\/a><\/noindex>.<\/p>\n
Open-source tools provide independent organizations and startups with greater opportunities. Over time, it is likely that the new approaches of OpenROAD to the development of EDA tools and chip design may become an industry standard.<\/p>\n
\nWhat we write about in our corporate blog:<\/p>\n