{"id":37343,"date":"2019-10-31T22:17:07","date_gmt":"2019-10-31T19:17:07","guid":{"rendered":"https:\/\/prohoster.info\/blog\/ibm-obyavil-ob-otkrytii-arhitektury-protsessorov-power\/"},"modified":"2019-10-31T22:17:07","modified_gmt":"2019-10-31T19:17:07","slug":"ibm-obyavil-ob-otkrytii-arhitektury-protsessorov-power","status":"publish","type":"post","link":"https:\/\/prohoster.info\/en\/blog\/news\/ibm-obyavil-ob-otkrytii-arhitektury-protsessorov-power","title":{"rendered":"IBM has announced the opening of the Power processor architecture.","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

IBM announced<\/a><\/noindex> on the transition of the Power Instruction Set Architecture (ISA) to an open standard. In 2013, IBM established the OpenPOWER consortium, allowing for the licensing of related POWER intellectual property and providing full access to specifications. However, licensing fees for chip production continued to be collected. From now on, the creation of custom chip modifications based on the Power instruction set architecture will become publicly available and will not require royalties. Additionally, the right to use all IBM patents related to Power for free is granted, and project management will be transferred to the community, which will now
\nbe involved in decision-making processes.<\/p>\n

The organization overseeing the development, the OpenPOWER Foundation, will translated<\/a><\/noindex> come under the Linux Foundation, enabling the establishment of an independent platform for further collaborative development of the Power architecture, free from ties to any specific manufacturer. The OpenPOWER consortium already has has been joined by<\/a><\/noindex> over 350 companies. The community has been provided with more than 3 million lines of code for system firmware, specifications, and diagrams necessary for creating Power-compatible chips. <\/p>\n

In addition to the transition to an open hardware classification for the instruction set architecture components, IBM has also transferred some related technologies used in Power9 chips to the community, including a software implementation (softcore) of the POWER ISA, as well as a reference design for developing extensions based on the OpenCAPI<\/a><\/noindex> (Open Coherent Accelerator Processor Interface) and OMI (Open Memory Interface). The provided software implementation allows for simulating the operation of a reference processor using Xilinx FPGA. <\/p>\n

The OpenCAPI technology will enable maximum performance and eliminate bottlenecks in the interaction between processor cores and integrated devices, such as GPUs, ASICs, various hardware accelerators, network chips, and data storage controllers. OMI will increase memory controller bandwidth and reduce latency. For example, thanks to these enhancements based on Power, it will be possible to create specialized chips optimized for artificial intelligence tasks and high-performance in-memory data analysis. <\/p>\n

Compared to existing open architectures MIPS<\/a><\/noindex> and RISC-V<\/a><\/noindex>The Power architecture is primarily appealing due to its readiness for creating modern server systems, industrial platforms, and clusters. For instance, in collaboration with IBM, NVIDIA and Mellanox have launched two of the largest clusters in the world based on Power architecture, leading the freedom<\/a><\/noindex> Top500 supercomputers.<\/p>\n

<\/a><\/noindex><\/p>\n

Source: opennet.ru<\/a><\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"

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