{"id":38437,"date":"2019-10-31T22:23:44","date_gmt":"2019-10-31T19:23:44","guid":{"rendered":"https:\/\/prohoster.info\/blog\/dzhim-keller-perspektivnye-mikroarhitektury-intel-obespechat-znachitelnyj-rost-proizvoditelnosti\/"},"modified":"2019-10-31T22:23:44","modified_gmt":"2019-10-31T19:23:44","slug":"dzhim-keller-perspektivnye-mikroarhitektury-intel-obespechat-znachitelnyj-rost-proizvoditelnosti","status":"publish","type":"post","link":"https:\/\/prohoster.info\/en\/blog\/news\/dzhim-keller-perspektivnye-mikroarhitektury-intel-obespechat-znachitelnyj-rost-proizvoditelnosti","title":{"rendered":"Jim Keller: promising Intel microarchitectures will bring significant performance gains","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

According to information shared by Intel's Senior Vice President of Technology and System Architecture Jim Keller, his company is currently working on a fundamentally new microarchitecture that is expected to be \"significantly larger and closer to a linear performance dependency on the number of transistors\" than the current Sunny Cove design. This suggests that in a few years, we will have a processor that is far more complex and significantly more powerful than the CPUs that the microprocessor giant offers today.<\/p>\n

The new Sunny Cove microarchitecture used by Intel in its latest Ice Lake processors marks a significant breakthrough, as it has notably improved the IPC (instructions per clock) after a fairly long hiatus. However, processor guru Jim Keller, currently employed by Intel, states that this is far from the final milestone. He is now working on the next generation of microarchitecture that will fully exploit the expected substantial increase in transistor budget over the next few years.<\/p>\n

\"Jim<\/p>\n

According to Intel's estimates, the Sunny Cove cores have a performance advantage of 15\u201318% over the Coffee Lake cores at the same clock frequency. However, the transistor budget for Sunny Cove exceeds that of its predecessor by a much larger margin\u2014about 38%. According to the information revealed by Keller, the Sunny Cove core consists of approximately 300 million 10-nm transistors, while the Coffee Lake core includes around 217 million 14-nm transistors. Therefore, the performance increase in Sunny Cove does not reach a linear relationship with the transistor budget: the progress in performance turned out to be roughly half the growth of the semiconductor die's complexity. Keller believes this should not be the case.<\/p>\n

Speaking at a lecture at Berkeley University, a leading specialist from Intel discussed the evolution of Intel processor microarchitectures and did not stop at Sunny Cove but mentioned a possible successor to this architecture: \"Sunny Cove operates with 800 instructions simultaneously, executing from 3 to 6 x86 instructions per cycle\u2026 It has massive data predictors, massive branch predictors. But we are working on a generation of microarchitecture that is significantly larger, and the law of performance growth is closer to linear. This is indeed a serious shift in mindset.\"<\/p>\n

<\/center><\/p>\n

The role of a star engineer is that processor manufacturing is still far from reaching any limits. As Keller states, Intel has substantial plans for the future, including a 50-fold increase in the number of transistors in processors and significant improvements in nearly every functional unit. And there is nothing impossible about this. As Keller explains: \"Computers are created by a vast number of people, but in reality, it is a large number of small teams. One can improve transition predictions, instruction sets, architectures, and engage in optimization, using more advanced design tools and better libraries. The number of different application points where there is room for innovation is indeed very large.\"<\/p>\n

\"Jim<\/p>\n

Intel's current public plans include two iterations of microarchitecture improvement following Sunny Cove. In the upcoming Willow Cove design, changes to the cache subsystem and a shift to a new semiconductor technology (likely 7 nm) are promised. Then, in Golden Cove, single-thread performance will be enhanced with a focus on AI task performance along with optimizations necessary for better performance in fifth-generation networks. In his report, Jim Keller may have been referring to Golden Cove, although nothing specific was mentioned on this matter.<\/p>\n

<\/p>\n

<\/center><\/p>\n

\t\t\t\t


\n\t\t\t\t\t\t\t\t<\/center>
Source: 3dnews.ru<\/a><\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"

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