{"id":55775,"date":"2020-01-28T00:00:00","date_gmt":"2020-01-27T21:00:00","guid":{"rendered":"https:\/\/prohoster.info\/blog\/blog_prohoster\/intel-voshla-v-chips-alliance-i-podarila-miru-shinu-advanced-interface-bus"},"modified":"2020-02-18T14:03:55","modified_gmt":"2020-02-18T11:03:55","slug":"intel-voshla-v-chips-alliance-i-podarila-miru-shinu-advanced-interface-bus","status":"publish","type":"post","link":"https:\/\/prohoster.info\/en\/blog\/news\/intel-voshla-v-chips-alliance-i-podarila-miru-shinu-advanced-interface-bus","title":{"rendered":"Intel has joined the CHIPS Alliance and gifted the world the Advanced Interface Bus.","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

Open standards are gaining more supporters. IT giants are forced not only to acknowledge this phenomenon but also to contribute their unique developments to open communities. A recent example is Intel's transfer of the AIB bus to the CHIPS Alliance.<\/p>\n

\"Intel<\/p>\n

This week, Intel became a member of the CHIPS Alliance<\/a><\/noindex> (Common Hardware for Interfaces, Processors and Systems). As indicated by the CHIPS acronym, this industry consortium is working on developing a wide range of open solutions for SoCs and high-density chip packaging, such as SiP (system-in-packages).<\/p>\n

By becoming a member of the alliance, Intel donated its internally developed bus Advanced Interface Bus<\/a><\/noindex> (AIB). Of course, it's not purely altruistic: while the AIB bus will allow anyone to create efficient chip-to-chip interfaces without paying royalties to Intel, the company also aims to increase the popularity of its own chiplets.<\/p>\n

\"Intel<\/p>\n

The AIB bus is developed by Intel under a DARPA program. The U.S. military has long been interested in highly integrated logic made up of multiple crystals. The first generation of the AIB bus was introduced in 2017. The transfer speed then reached 2 Gbps per lane. The second generation of the AIB bus was presented last year. The transfer speed increased to 5.4 Gbps. Additionally, the AIB bus offers the best industry density of exchange speed per mm: 200 Gbps. For multi-chip packages, this is a crucial parameter.<\/p>\n

<\/center><\/p>\n

It's important to note that the AIB bus is indifferent to the process technology and packaging method. It can be implemented in both Intel's spatial multi-chip packaging EMIB and in TSMC's unique packaging CoWoS or in packages from other companies. The flexibility of the interface will greatly benefit open standards.<\/p>\n

\"Intel<\/p>\n

At the same time, it should be reminded that another open community, the Open Compute Project, is also developing its own bus for connecting chiplets (crystals). This is the Open Domain-Specific Architecture bus (ODSA<\/a><\/noindex>). The working group for creating the ODSA was formed relatively recently, so Intel's entry into the CHIPS Alliance and the donation of the AIB bus to the community may be a preemptive move.<\/p>\n

<\/p>\n

<\/center><\/p>\n

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\n\t\t\t\t\t\t\t\t<\/center>
Source: 3dnews.ru<\/a><\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"

\u041e\u0442\u043a\u0440\u044b\u0442\u044b\u0435 \u0441\u0442\u0430\u043d\u0434\u0430\u0440\u0442\u044b \u043f\u0440\u0438\u043e\u0431\u0440\u0435\u0442\u0430\u044e\u0442 \u0432\u0441\u0451 \u0431\u043e\u043b\u044c\u0448\u0435 \u0441\u0442\u043e\u0440\u043e\u043d\u043d\u0438\u043a\u043e\u0432. \u0413\u0438\u0433\u0430\u043d\u0442\u044b \u0440\u044b\u043d\u043a\u0430 \u0418\u0422 \u0432\u044b\u043d\u0443\u0436\u0434\u0435\u043d\u044b \u043d\u0435 \u0442\u043e\u043b\u044c\u043a\u043e \u0441\u0447\u0438\u0442\u0430\u0442\u044c\u0441\u044f \u0441 \u044d\u0442\u0438\u043c \u044f\u0432\u043b\u0435\u043d\u0438\u0435\u043c, \u043d\u043e \u0442\u0430\u043a\u0436\u0435 \u043e\u0442\u0434\u0430\u0432\u0430\u0442\u044c \u043e\u0442\u043a\u0440\u044b\u0442\u044b\u043c \u0441\u043e\u043e\u0431\u0449\u0435\u0441\u0442\u0432\u0430\u043c \u0441\u0432\u043e\u0438 \u0443\u043d\u0438\u043a\u0430\u043b\u044c\u043d\u044b\u0435 \u0440\u0430\u0437\u0440\u0430\u0431\u043e\u0442\u043a\u0438. \u0421\u0432\u0435\u0436\u0438\u043c \u043f\u0440\u0438\u043c\u0435\u0440\u043e\u043c \u0441\u0442\u0430\u043b\u0430 \u043f\u0435\u0440\u0435\u0434\u0430\u0447\u0430 \u0448\u0438\u043d\u044b Intel AIB \u0441\u043e\u044e\u0437\u0443 CHIPS Alliance. \u041d\u0430 \u044d\u0442\u043e\u0439 \u043d\u0435\u0434\u0435\u043b\u0435 \u043a\u043e\u043c\u043f\u0430\u043d\u0438\u044f Intel \u0441\u0442\u0430\u043b\u0430 \u0443\u0447\u0430\u0441\u0442\u043d\u0438\u043a\u043e\u043c CHIPS Alliance (Common Hardware for Interfaces, Processors and Systems). \u041a\u0430\u043a \u0441\u043b\u0435\u0434\u0443\u0435\u0442 \u0438\u0437 \u0440\u0430\u0441\u0448\u0438\u0444\u0440\u043e\u0432\u043a\u0438 \u0430\u0431\u0431\u0440\u0435\u0432\u0438\u0430\u0442\u0443\u0440\u044b CHIPS, […]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[702],"tags":[],"class_list":["post-55775","post","type-post","status-publish","format-standard","hentry","category-news"],"aioseo_notices":[],"aioseo_head":"\n\t\t\n\t\n\t\n\t\n\t\n\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\n","aioseo_head_json":{"title":"\ud83e\udd47Intel joined the CHIPS Alliance and gifted the world the Advanced Interface Bus | ProHoster","description":"Open standards are gaining more supporters. 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