{"id":73397,"date":"2020-03-09T08:42:28","date_gmt":"2020-03-09T05:42:28","guid":{"rendered":"https:\/\/prohoster.info\/blog\/administrirovanie\/vvedenie-v-ssd-chast-4-fizicheskaya"},"modified":"2020-03-09T08:42:28","modified_gmt":"2020-03-09T05:42:28","slug":"vvedenie-v-ssd-chast-4-fizicheskaya","status":"publish","type":"post","link":"https:\/\/prohoster.info\/en\/blog\/administrirovanie\/vvedenie-v-ssd-chast-4-fizicheskaya","title":{"rendered":"Introduction to SSDs. Part 4. Physical","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"<p><img decoding=\"async\" alt=\"Introduction to SSDs. Part 4. Physical\" src=\"\/wp-content\/uploads\/2020\/03\/07ee6f41981982df22293878e6c6d99a.png\" style=\"display:block;margin: 0 auto;\" \/><br \/>\nThe previous parts of the series \"Introduction to SSDs\" informed the reader about the history of SSD drives, the interfaces for interacting with them, and popular form factors. The fourth part will discuss data storage within the drives.<br \/>\n<noindex><a rel=\"nofollow\" name=\"habracut\"><\/a><\/noindex><br \/>\n<i>In the previous articles of the series:<\/i><\/p>\n<ol>\n<li><i><noindex><a rel=\"nofollow\" href=\"https:\/\/habr.com\/ru\/company\/selectel\/blog\/475304\/\">The History of HDD and SSD Creation<\/a><\/noindex><\/i><\/li>\n<li><i><noindex><a rel=\"nofollow\" href=\"https:\/\/habr.com\/ru\/company\/selectel\/blog\/478684\/\">The Emergence of Storage Interfaces<\/a><\/noindex><\/i><\/li>\n<li><i><noindex><a rel=\"nofollow\" href=\"https:\/\/habr.com\/ru\/company\/selectel\/blog\/488230\/\">Features of Form Factors<\/a><\/noindex><\/i><\/li>\n<\/ol>\n<p>\nData storage in solid-state drives can be divided into two logical parts: storing information in a single cell and organizing the storage of cells.<\/p>\n<p>Each cell of a solid-state drive stores <b>one or several bits of information<\/b>. Different <b>physical processes<\/b>are used for storing information. During the development of solid-state drives, the following physical quantities were worked on for encoding information:<\/p>\n<ul>\n<li><b>electric charges<\/b> (including Flash memory);<\/li>\n<li><b>magnetic moments<\/b> (magnetoresistive memory);<\/li>\n<li><b>phase states<\/b> (phase change memory).<\/li>\n<\/ul>\n<p><\/p>\n<h2>Charge-based memory<\/h2>\n<p>\nEncoding information using negative charge is the basis for several solutions:<\/p>\n<ul>\n<li>ultraviolet-erasable PROMs (EPROM);<\/li>\n<li>electrically erasable PROMs (EEPROM);<\/li>\n<li>Flash memory.<\/li>\n<\/ul>\n<p>\n<img decoding=\"async\" alt=\"Introduction to SSDs. Part 4. Physical\" src=\"\/wp-content\/uploads\/2020\/03\/8859aa8e143aeefc0a33f8255f1708f3.png\" style=\"display:block;margin: 0 auto;\" \/><br \/>\nEach memory cell is a <b>MOSFET with a floating gate<\/b>, in which a negative charge is stored. Its difference from a regular MOSFET lies in the presence of a floating gate \u2014 a conductor within the dielectric layer.<\/p>\n<p>When a potential difference is created between the drain and the source, and there is positive potential on the gate, current will flow from the source to the drain. However, with a sufficiently large potential difference, some electrons \"break through\" the dielectric layer and settle in the floating gate. This phenomenon is called <noindex><a rel=\"nofollow\" href=\"https:\/\/ru.wikipedia.org\/wiki\/%D0%A2%D1%83%D0%BD%D0%BD%D0%B5%D0%BB%D1%8C%D0%BD%D1%8B%D0%B9_%D1%8D%D1%84%D1%84%D0%B5%D0%BA%D1%82\">the tunneling effect.<\/a><\/noindex>.<\/p>\n<p><img decoding=\"async\" alt=\"Introduction to SSDs. Part 4. Physical\" src=\"\/wp-content\/uploads\/2020\/03\/7b6141b5e53940bcc073a3ee1c327eec.png\" style=\"display:block;margin: 0 auto;\" \/><br \/>\nThe negatively charged floating gate creates an electric field that obstructs current flow from the source to the drain. Moreover, the presence of electrons in the floating gate increases the threshold voltage at which the transistor turns on. With each \"write\" to the floating gate of the transistor, the dielectric layer is slightly damaged, imposing a limit on the number of rewrite cycles for each cell.<\/p>\n<blockquote><p>Floating-gate MOS transistors were developed by Dawon Kahng and Simon Min Sze at Bell Labs in 1967. Later, while investigating defects in integrated circuits, it was observed that the threshold voltage that opens the transistor had changed due to charge in the floating gate. This discovery motivated Dov Frohman to begin working on memory based on this phenomenon.<\/p><\/blockquote>\n<p>The change in threshold voltage allows for 'programming' the transistors. Transistors with charge in the floating gate will not turn on when the voltage applied to the gate exceeds the threshold voltage for a transistor without electrons, but is less than the threshold voltage for a transistor with electrons. Let's call this value <b>the read voltage<\/b>.<\/p>\n<h3>Erasable Programmable Read-Only Memory<\/h3>\n<p>\n<noindex><a rel=\"nofollow\" href=\"https:\/\/ru.wikipedia.org\/wiki\/EPROM\"><img decoding=\"async\" alt=\"Introduction to SSDs. Part 4. Physical\" src=\"\/wp-content\/uploads\/2020\/03\/bfe650362b93b530401453130147d679.png\" style=\"display:block;margin: 0 auto;\" \/><\/a><\/noindex><br \/>\nIn 1971, Intel employee Dov Frohman created rewritable memory on transistors, called <b>Erasable Programmable Read-Only Memory (EPROM)<\/b>. Writing to memory was done with a special device \u2014 a programmer. The programmer applies a higher voltage to the chip than what is used in digital circuits, thereby 'writing' electrons into the floating gates of the transistors where needed.<\/p>\n<p><noindex><a rel=\"nofollow\" href=\"https:\/\/ru.wikipedia.org\/wiki\/EPROM\"><img decoding=\"async\" alt=\"Introduction to SSDs. Part 4. Physical\" src=\"\/wp-content\/uploads\/2020\/03\/959b0d6bac92dafb1eb4aa46ea03952c.png\" style=\"display:block;margin: 0 auto;\" \/><\/a><\/noindex><br \/>\nIn EPROM memory, clearing the floating gates of the transistors was not intended to be done electrically. Instead, it was proposed to expose the transistors to strong ultraviolet radiation, whose photons provide the energy necessary for electrons to leave the floating gate. To allow ultraviolet light to penetrate deep into the chip, quartz glass was added to the casing.<\/p>\n<p><noindex><a rel=\"nofollow\" href=\"https:\/\/newsroom.intel.com\/news\/intel-50-qa-intels-dov-frohman-inventor-eprom\/#gs.wum63d\"><img decoding=\"async\" alt=\"Introduction to SSDs. Part 4. Physical\" src=\"\/wp-content\/uploads\/2020\/03\/725b3ed07b0a5c5ceb285f6b7e234f08.png\" style=\"display:block;margin: 0 auto;\" \/><\/a><\/noindex><\/p>\n<blockquote><p>Frohman first presented his EPROM prototype in February 1971 at the Solid State Circuits Conference in Philadelphia. Gordon Moore recalled the demonstration: \"Dov demonstrated a bit pattern in the EPROM memory cells. When the cells were exposed to ultraviolet light, the bits disappeared one by one until the familiar Intel logo was completely erased. ... The bits vanished, and when the last one disappeared, the entire audience broke into applause. Dov's paper was recognized as the best at the conference.\"<i> \u2014 Translation of the article <noindex><a rel=\"nofollow\" href=\"https:\/\/newsroom.intel.com\/news\/intel-at-50-erasable-programmable-read-only-memory\">newsroom.intel.com<\/a><\/noindex><\/i><\/p><\/blockquote>\n<p>EPROM memory is more expensive than the previously used \"one-time\" read-only memory (ROM), but the ability to reprogram allows for faster debugging of circuits and shorter development times for new hardware.<\/p>\n<p>Reprogramming ROM with ultraviolet light was a significant breakthrough; however, the idea of electrical rewriting was already \"in the air.\"<\/p>\n<h3>Electrically Erasable Programmable Read-Only Memory<\/h3>\n<p>\nIn 1972, three Japanese researchers: Yasuo Tarui, Yutaka Hayashi, and Kiyoko Nagai introduced the first electrically erasable programmable read-only memory (Electrically Erasable Programmable Read-Only Memory, EEPROM or E2PROM). Their scientific research later became part of the patents for commercial EEPROM implementations.<\/p>\n<p>Each EEPROM memory cell consists of several transistors:<\/p>\n<ul>\n<li>a floating gate transistor for storing a bit;<\/li>\n<li>a transistor for controlling the read-write mode.<\/li>\n<\/ul>\n<p>\nThis design significantly complicates the wiring of the circuit, so EEPROM memory was used in cases where small memory capacity was not critical. For storing large volumes of data, EPROM was still used.<\/p>\n<h3>Flash memory<\/h3>\n<p>\nFlash memory, combining the best features of EPROM and EEPROM, was developed by Japanese professor Fujio Masuoka, an engineer at Toshiba, in 1980. The first development was named NOR-type Flash memory and, like its predecessors, is based on floating-gate MOS transistors.<\/p>\n<p><img decoding=\"async\" alt=\"Introduction to SSDs. Part 4. Physical\" src=\"\/wp-content\/uploads\/2020\/03\/afb642e62142301a0430736f88a747a9.png\" style=\"display:block;margin: 0 auto;\" \/><br \/>\nNOR-type Flash memory is a two-dimensional array of transistors. The gates of the transistors are connected to word lines, and the sources are connected to bit lines. When voltage is applied to the word line, the transistors that contain electrons, meaning those storing a \"1,\" will not open and current will not flow. The presence or absence of current on the bit line indicates the bit value.<\/p>\n<p><img decoding=\"async\" alt=\"Introduction to SSDs. Part 4. Physical\" src=\"\/wp-content\/uploads\/2020\/03\/53a8762b0e7cec9b6ebdf5fb91e9b328.png\" style=\"display:block;margin: 0 auto;\" \/><br \/>\nSeven years later, Fujio Masuoka developed NAND-type Flash memory. This type of memory differs in the number of transistors on the bit line. In NOR memory, each transistor is directly connected to the bit line, while in NAND memory, transistors are connected in series.<\/p>\n<p><img decoding=\"async\" alt=\"Introduction to SSDs. Part 4. Physical\" src=\"\/wp-content\/uploads\/2020\/03\/14db892a94f6bf36fe3f9dc8f5ad76c3.png\" style=\"display:block;margin: 0 auto;\" \/><br \/>\nReading from the memory of such a configuration is more complex: a voltage required for reading is applied to the necessary word line, while voltages that turn on the transistor regardless of the charge level in it are applied to all other word lines. Since all other transistors are guaranteed to be turned on, the presence of voltage on the bit line depends solely on one transistor to which the reading voltage is applied.<\/p>\n<p>The invention of NAND-type Flash memory allows for significantly denser circuitry, accommodating a larger memory volume within the same dimensions. Until 2007, memory capacity was increased by reducing the manufacturing process of the chip.<\/p>\n<p>In 2007, Toshiba introduced a new version of NAND memory: <b>Vertical NAND (V-NAND)<\/b>, also known as <b>3D NAND<\/b>. This technology emphasizes the stacking of transistors in multiple layers, which again allows for tighter circuitry and increased memory capacity. However, the compaction of the circuit cannot be repeated indefinitely, leading to the exploration of other methods to increase the stored memory capacity.<\/p>\n<p><img decoding=\"async\" alt=\"Introduction to SSDs. Part 4. Physical\" src=\"\/wp-content\/uploads\/2020\/03\/11bbf1b13a91ae464c305fac941218ec.png\" style=\"display:block;margin: 0 auto;\" \/><br \/>\nInitially, each transistor stored two levels of charge: logical zero and logical one. This approach is called <b>Single-Level Cell (SLC)<\/b>. Drives with this technology are distinguished by high reliability and maximum rewrite cycles.<\/p>\n<p>Over time, the decision was made to increase the storage capacity at the cost of endurance. Thus, the number of charge levels in the cell was increased to four, and the technology was named <b>Multi-Level Cell (MLC)<\/b>. Next came <b>Triple-Level Cell (TLC)<\/b> and <b>Quad-Level Cell (QLC)<\/b>. In the future, a new level will appear \u2014 <b>Penta-Level Cell (PLC)<\/b> with five bits in one cell. The more bits are placed in one cell, the larger the capacity of the drive at the same cost, but with less endurance.<\/p>\n<p>The compaction of the circuit by reducing the manufacturing process and increasing the number of bits in one transistor negatively affects the stored data. Although the same transistors are used in EPROM and EEPROM, EPROM and EEPROM can store data without power for ten years, whereas modern Flash memory can forget everything after just one year.<\/p>\n<blockquote><p>The use of Flash memory in the space industry is problematic, as radiation severely affects the electrons in floating gates.<\/p><\/blockquote>\n<p>The listed issues prevent Flash memory from becoming an undisputed leader in data storage. Although Flash-based drives are widely used, research is ongoing into other types of memory that lack these drawbacks, including information storage in magnetic moments and phase states.<\/p>\n<h2>Magnetoresistive memory<\/h2>\n<p>\n<noindex><a rel=\"nofollow\" href=\"https:\/\/www.youtube.com\/watch?v=lne8r2mIwuA\"><img decoding=\"async\" alt=\"Introduction to SSDs. Part 4. Physical\" src=\"\/wp-content\/uploads\/2020\/03\/12ad7d4ed598506d78199c56e91a3831.png\" style=\"display:block;margin: 0 auto;\" \/><\/a><\/noindex><br \/>\nInformation encoding using magnetic moments first appeared in 1955 as core memory. Until the mid-1970s, ferrite memory was the leading type of memory. Reading a bit from this type of memory led to the demagnetization of the core, resulting in data loss. Thus, after reading a bit, it had to be rewritten.<\/p>\n<p>In modern designs of magnetoresistive memory, two layers of ferromagnet are used instead of cores, separated by a dielectric. One layer acts as a permanent magnet, while the second layer changes its magnetization direction. Reading a bit from such a cell involves measuring resistance while current passes through: if the layers are magnetized in opposite directions, the resistance is higher, which corresponds to the value \"1\".<\/p>\n<p>Ferrite memory does not require a constant power supply to maintain the stored information; however, the magnetic field of one cell can affect its \"neighbor,\" which places a limit on circuit density.<\/p>\n<blockquote><p>According to <noindex><a rel=\"nofollow\" href=\"https:\/\/www.jedec.org\/sites\/default\/files\/Alvin_Cox%20%5BCompatibility%20Mode%5D_0.pdf\">JEDEC<\/a><\/noindex> SSD drives based on Flash memory must retain information for at least three months at an ambient temperature of 40\u00b0C without power. The chip developed by Intel <noindex><a rel=\"nofollow\" href=\"https:\/\/3dnews.ru\/983125\">based on magnetoresistive memory<\/a><\/noindex> promises to preserve data for ten years at 200\u00b0C.<\/p><\/blockquote>\n<p>Despite the complexity of development, magnetoresistive memory does not degrade during use and exhibits superior performance compared to other memory types, preventing it from being written off.<\/p>\n<h2>Phase change memory<\/h2>\n<p>\nThe third promising type of memory is phase change memory. This type of memory utilizes the properties of chalcogenides to switch between crystalline and amorphous states when heated.<\/p>\n<blockquote><p><b>Chalcogenides<\/b> \u2014 binary connections of metals with group 16 (6th group of the main subgroup) of the periodic table of Mendeleev. For example, telluride of germanium (GeTe) and telluride of antimony (III) (Sb2Te3) are used in CD-RW, DVD-RW, DVD-RAM, and Blu-ray discs.<\/p><\/blockquote>\n<p>Research on the application of phase transition for data storage was conducted in <b>the 1960s<\/b> by Stanford Ovshinsky, but it did not reach commercial realization at that time. In the 2000s, interest in the technology resurfaced; Samsung patented a technology that allows switching bits in 5 ns, while Intel and STMicroelectronics increased the number of states to four, thereby doubling the potential capacity.<\/p>\n<p>When heated above the melting point, the chalcogenide loses its crystalline structure and, upon cooling, transforms into an amorphous form characterized by high electrical resistance. Conversely, when heated to a temperature above the crystallization point but below the melting point, the chalcogenide returns to its crystalline state with a low resistance level.<\/p>\n<p>Phase change memory does not require 'recharging' over time, and it is also not sensitive to radiation, unlike charge-based memory. This type of memory can retain information for 300 years at a temperature of 85\u00b0C.<\/p>\n<p>It is believed that Intel\u2019s development, the <b>3D Crosspoint (3D XPoint)<\/b> uses phase change specifically for information storage. 3D XPoint is utilized in Intel\u00ae Optane\u2122 Memory drives, which claim a higher durability.<\/p>\n<h2>Conclusion<\/h2>\n<p>\nThe physical device of solid-state drives has undergone many changes over more than half a century, however, each solution has its drawbacks. Despite the undeniable popularity of Flash memory, several companies, including Samsung and Intel, are exploring the possibility of creating memory based on magnetic moments.<\/p>\n<p>Reducing cell wear, increasing their density, and enhancing the overall capacity of the drive are currently promising directions for the further development of solid-state drives.<\/p>\n<blockquote><p>You can test the coolest NAND and 3D XPoint drives available today in our <noindex><a rel=\"nofollow\" href=\"http:\/\/slc.tl\/S-MoX\">Selectel LAB<\/a><\/noindex>.<\/p><\/blockquote>\n<p>Do you think that information storage technology based on electric charges will be replaced by others, such as quartz disks or optical memory using nanocrystal salt?<br \/>\n<br \/>Source: <a content=\"nofollow\" rel=\"nofollow\" href=\"https:\/\/habr.com\/ru\/company\/selectel\/blog\/491264\/\">habr.com<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"<p>\u041f\u0440\u043e\u0448\u043b\u044b\u0435 \u0447\u0430\u0441\u0442\u0438 \u0446\u0438\u043a\u043b\u0430 \u00ab\u0412\u0432\u0435\u0434\u0435\u043d\u0438\u0435 \u0432 SSD\u00bb \u043f\u043e\u0432\u0435\u0434\u0430\u043b\u0438 \u0447\u0438\u0442\u0430\u0442\u0435\u043b\u044e \u043f\u0440\u043e \u0438\u0441\u0442\u043e\u0440\u0438\u044e \u043f\u043e\u044f\u0432\u043b\u0435\u043d\u0438\u044f SSD-\u043d\u0430\u043a\u043e\u043f\u0438\u0442\u0435\u043b\u0435\u0439, \u0438\u043d\u0442\u0435\u0440\u0444\u0435\u0439\u0441\u044b \u0432\u0437\u0430\u0438\u043c\u043e\u0434\u0435\u0439\u0441\u0442\u0432\u0438\u044f \u0441 \u043d\u0438\u043c\u0438 \u0438 \u043f\u043e\u043f\u0443\u043b\u044f\u0440\u043d\u044b\u0435 \u0444\u043e\u0440\u043c-\u0444\u0430\u043a\u0442\u043e\u0440\u044b. \u0427\u0435\u0442\u0432\u0451\u0440\u0442\u0430\u044f \u0447\u0430\u0441\u0442\u044c \u0440\u0430\u0441\u0441\u043a\u0430\u0436\u0435\u0442 \u043e \u0445\u0440\u0430\u043d\u0435\u043d\u0438\u0438 \u0434\u0430\u043d\u043d\u044b\u0445 \u0432\u043d\u0443\u0442\u0440\u0438 \u043d\u0430\u043a\u043e\u043f\u0438\u0442\u0435\u043b\u0435\u0439. \u0412 \u043f\u0440\u0435\u0434\u044b\u0434\u0443\u0449\u0438\u0445 \u0441\u0442\u0430\u0442\u044c\u044f\u0445 \u0446\u0438\u043a\u043b\u0430: \u0418\u0441\u0442\u043e\u0440\u0438\u044f \u0441\u043e\u0437\u0434\u0430\u043d\u0438\u044f HDD \u0438 SSD \u0412\u043e\u0437\u043d\u0438\u043a\u043d\u043e\u0432\u0435\u043d\u0438\u0435 \u0438\u043d\u0442\u0435\u0440\u0444\u0435\u0439\u0441\u043e\u0432 \u043d\u0430\u043a\u043e\u043f\u0438\u0442\u0435\u043b\u0435\u0439 \u041e\u0441\u043e\u0431\u0435\u043d\u043d\u043e\u0441\u0442\u0438 \u0444\u043e\u0440\u043c-\u0444\u0430\u043a\u0442\u043e\u0440\u043e\u0432 \u0425\u0440\u0430\u043d\u0435\u043d\u0438\u0435 \u0434\u0430\u043d\u043d\u044b\u0445 \u0432 \u0442\u0432\u0435\u0440\u0434\u043e\u0442\u0435\u043b\u044c\u043d\u044b\u0445 \u043d\u0430\u043a\u043e\u043f\u0438\u0442\u0435\u043b\u044f\u0445 \u043c\u043e\u0436\u043d\u043e \u0440\u0430\u0437\u0434\u0435\u043b\u0438\u0442\u044c \u043d\u0430 \u0434\u0432\u0435 \u043b\u043e\u0433\u0438\u0447\u0435\u0441\u043a\u0438\u0435 \u0447\u0430\u0441\u0442\u0438: \u0445\u0440\u0430\u043d\u0435\u043d\u0438\u0435 \u0438\u043d\u0444\u043e\u0440\u043c\u0430\u0446\u0438\u0438 \u0432 [&hellip;]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":73398,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[688],"tags":[],"class_list":["post-73397","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-administrirovanie"],"aioseo_notices":[],"aioseo_head":"\n\t\t<!-- All in One SEO 5.0.2 - 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