{"id":102428,"date":"2021-11-30T15:36:39","date_gmt":"2021-11-30T13:36:41","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/vortex-otkrytyj-gpgpu-na-baze-arhitektury-risc-v-sovmestimyj-s-opencl"},"modified":"2021-11-30T15:36:39","modified_gmt":"2021-11-30T13:36:41","slug":"vortex-otkrytyj-gpgpu-na-baze-arhitektury-risc-v-sovmestimyj-s-opencl","status":"publish","type":"post","link":"https:\/\/prohoster.info\/fr\/blog\/news\/vortex-otkrytyj-gpgpu-na-baze-arhitektury-risc-v-sovmestimyj-s-opencl","title":{"rendered":"Vortex \u2014 un GPGPU ouvert bas\u00e9 sur l'architecture RISC-V, compatible avec OpenCL","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"<p>Un groupe de chercheurs de l'Institut Technologique de G\u00e9orgie d\u00e9veloppe le projet de recherche Vortex, qui propose un GPGPU ouvert bas\u00e9 sur l'architecture de l'ensemble d'instructions RISC-V, visant \u00e0 ex\u00e9cuter des calculs parall\u00e8les en utilisant l'API OpenCL et le mod\u00e8le d'ex\u00e9cution SIMT (Single Instruction, Multiple Threads), ainsi qu'\u00e0 mener des recherches dans le domaine de la 3D et du d\u00e9veloppement de nouvelles architectures de GPU. Le projet est encore \u00e0 l'\u00e9tat de prototype, fonctionnant gr\u00e2ce \u00e0 un FPGA. Les sch\u00e9mas, les descriptions des blocs mat\u00e9riels en Verilog, le simulateur, les pilotes et la documentation de projet associ\u00e9e sont diffus\u00e9s sous la licence BSD.     <\/p>\n<p>Dans sa forme actuelle, un ISA RISC-V standard est fourni, \u00e9tendu par certaines instructions suppl\u00e9mentaires n\u00e9cessaires pour soutenir les fonctions GPU et la gestion des flux. Dans le cadre de son d\u00e9veloppement, les auteurs du projet ont tent\u00e9 de minimiser les changements dans l'architecture de l'ensemble d'instructions RISC-V, en utilisant autant que possible les instructions vectorielles d\u00e9j\u00e0 existantes. Une approche similaire est \u00e9galement appliqu\u00e9e dans le projet RV64X, qui d\u00e9veloppe \u00e9galement un GPU ouvert bas\u00e9 sur les technologies RISC-V.  <center><img decoding=\"async\" alt=\"Vortex - GPGPU open source bas\u00e9 sur l&#039;architecture RISC-V, compatible avec OpenCL\" src=\"\/wp-content\/uploads\/2021\/11\/b28015da9f9188f87f402a8b14ee070b.jpg\" style=\"display:block;margin: 0 auto;\" \/><\/center>        <\/p>\n<p>Les capacit\u00e9s de traitement graphique de Vortex sont actuellement limit\u00e9es. Un support pour OpenGL ES a \u00e9t\u00e9 annonc\u00e9 pour Vortex, mais dans le GPU, seule l'instruction \u00ab tex \u00bb pour acc\u00e9l\u00e9rer le traitement des textures est mise en \u0153uvre, et cela se fait au niveau du shader de fragment. Le rasteriseur int\u00e9gr\u00e9 est absent \u2014 tout le traitement des op\u00e9rations g\u00e9om\u00e9triques est r\u00e9alis\u00e9 du c\u00f4t\u00e9 du CPU syst\u00e8me, tandis que les primitives de base pour les points, les lignes et les triangles, ainsi que le traitement des fragments, de la profondeur et de la transparence, sont impl\u00e9ment\u00e9s en utilisant le noyau OpenCL.   <center><img decoding=\"async\" alt=\"Vortex - GPGPU open source bas\u00e9 sur l&#039;architecture RISC-V, compatible avec OpenCL\" src=\"\/wp-content\/uploads\/2021\/11\/a12215387481ff353fb2fd4454c286da.jpg\" style=\"display:block;margin: 0 auto;\" \/><\/center>    <\/p>\n<p>\u00c0 l'avenir, il est pr\u00e9vu d'impl\u00e9menter des extensions ISA sp\u00e9cifiques au traitement graphique, d'ajouter la prise en charge des API CUDA et Vulkan, ainsi que des extensions pour acc\u00e9l\u00e9rer les syst\u00e8mes d'apprentissage machine et d'analyse de donn\u00e9es. Pour le d\u00e9veloppement d'applications, un ensemble d'outils est propos\u00e9, comprenant des versions adapt\u00e9es de PoCL (compilateur et runtime OpenCL), LLVM\/Clang, GCC et Binutils. La simulation du fonctionnement de la puce est support\u00e9e \u00e0 l'aide de Verilator (simulateur Verilog) et SimX (simulation logicielle).    <center><img decoding=\"async\" alt=\"Vortex - GPGPU open source bas\u00e9 sur l&#039;architecture RISC-V, compatible avec OpenCL\" src=\"\/wp-content\/uploads\/2021\/11\/d0b801f648a6863f190ec62c4a36fb6a.jpg\" style=\"display:block;margin: 0 auto;\" \/><\/center>    <\/p>\n<p>Caract\u00e9ristiques principales de Vortex :  <\/p>\n<ul>\n<li class=\"l\"> Prise en charge de l'architecture de l'ensemble d'instructions RISC-V RV32IMF.\n<li class=\"l\"> Scalabilit\u00e9 de la puce jusqu'\u00e0 64 c\u0153urs avec caches L2 et L3 en option.\n<li class=\"l\"> Chaque c\u0153ur peut ex\u00e9cuter 1024 threads et fonctionne \u00e0 une fr\u00e9quence de 250 MHz.\n<li class=\"l\"> La puissance de calcul maximale est estim\u00e9e \u00e0 128 Gflops, avec une bande passante m\u00e9moire de 16 Go\/s. Une impl\u00e9mentation 32 c\u0153urs fonctionnant \u00e0 200 MHz, bas\u00e9e sur FPGA Altera Stratix 10, a montr\u00e9 une performance de 25,6 GFlops.\n<li class=\"l\"> Support du standard OpenCL 1.2.\n<li class=\"l\"> Possibilit\u00e9 d'impl\u00e9mentation sur FPGA Intel Arria 10 et Intel Stratix 10.    <\/ul>\n<p>Source : <a content=\"nofollow\" rel=\"nofollow\" href=\"https:\/\/www.opennet.ru\/opennews\/art.shtml?num=56253\">opennet.ru<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"<p>\u0413\u0440\u0443\u043f\u043f\u0430 \u0438\u0441\u0441\u043b\u0435\u0434\u043e\u0432\u0430\u0442\u0435\u043b\u0435\u0439 \u0438\u0437 \u0422\u0435\u0445\u043d\u043e\u043b\u043e\u0433\u0438\u0447\u0435\u0441\u043a\u043e\u0433\u043e \u0438\u043d\u0441\u0442\u0438\u0442\u0443\u0442\u0430 \u0414\u0436\u043e\u0440\u0434\u0436\u0438\u0438 \u0440\u0430\u0437\u0432\u0438\u0432\u0430\u0435\u0442 \u0438\u0441\u0441\u043b\u0435\u0434\u043e\u0432\u0430\u0442\u0435\u043b\u044c\u0441\u043a\u0438\u0439 \u043f\u0440\u043e\u0435\u043a\u0442 Vortex, \u043f\u0440\u0435\u0434\u043b\u0430\u0433\u0430\u044e\u0449\u0438\u0439 \u043e\u0442\u043a\u0440\u044b\u0442\u044b\u0439 GPGPU \u043d\u0430 \u0431\u0430\u0437\u0435 \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u044b \u043d\u0430\u0431\u043e\u0440\u0430 \u043a\u043e\u043c\u0430\u043d\u0434 RISC-V, \u043d\u0430\u0446\u0435\u043b\u0435\u043d\u043d\u044b\u0439 \u043d\u0430 \u0432\u044b\u043f\u043e\u043b\u043d\u0435\u043d\u0438\u0435 \u043f\u0430\u0440\u0430\u043b\u043b\u0435\u043b\u044c\u043d\u044b\u0445 \u0432\u044b\u0447\u0438\u0441\u043b\u0435\u043d\u0438\u0439 \u0441 \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u043d\u0438\u0435\u043c API OpenCL \u0438 \u043c\u043e\u0434\u0435\u043b\u0438 \u0432\u044b\u043f\u043e\u043b\u043d\u0435\u043d\u0438\u044f SIMT (Single Instruction, Multiple Threads), \u0430 \u0442\u0430\u043a\u0436\u0435 \u043d\u0430 \u043f\u0440\u043e\u0432\u0435\u0434\u0435\u043d\u0438\u0435 \u0438\u0441\u0441\u043b\u0435\u0434\u043e\u0432\u0430\u043d\u0438\u0439 \u0432 \u043e\u0431\u043b\u0430\u0441\u0442\u0438 3D-\u0433\u0440\u0430\u0444\u0438\u043a\u0438 \u0438 \u0440\u0430\u0437\u0440\u0430\u0431\u043e\u0442\u043a\u0438 \u043d\u043e\u0432\u044b\u0445 \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440 GPU. \u041f\u0440\u043e\u0435\u043a\u0442 \u043f\u043e\u043a\u0430 \u043d\u0430\u0445\u043e\u0434\u0438\u0442\u0441\u044f \u043d\u0430 \u0441\u0442\u0430\u0434\u0438\u0438 \u043f\u0440\u043e\u0442\u043e\u0442\u0438\u043f\u0430, [&hellip;]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":102429,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[702],"tags":[],"class_list":["post-102428","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news"],"aioseo_notices":[],"aioseo_head":"\n\t\t<!-- All in One SEO 5.0.2 - aioseo.com -->\n\t<meta name=\"description\" content=\"\u0413\u0440\u0443\u043f\u043f\u0430 \u0438\u0441\u0441\u043b\u0435\u0434\u043e\u0432\u0430\u0442\u0435\u043b\u0435\u0439 \u0438\u0437 \u0422\u0435\u0445\u043d\u043e\u043b\u043e\u0433\u0438\u0447\u0435\u0441\u043a\u043e\u0433\u043e \u0438\u043d\u0441\u0442\u0438\u0442\u0443\u0442\u0430 \u0414\u0436\u043e\u0440\u0434\u0436\u0438\u0438 \u0440\u0430\u0437\u0432\u0438\u0432\u0430\u0435\u0442 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