{"id":116366,"date":"2024-06-05T15:40:14","date_gmt":"2024-06-05T13:40:14","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/nabor-patchej-dlya-uskoreniya-shifrovaniya-deshifrovaniya-aes-gcm"},"modified":"2024-06-05T15:40:14","modified_gmt":"2024-06-05T13:40:14","slug":"nabor-patchej-dlya-uskoreniya-shifrovaniya-deshifrovaniya-aes-gcm","status":"publish","type":"post","link":"https:\/\/prohoster.info\/fr\/blog\/news\/nabor-patchej-dlya-uskoreniya-shifrovaniya-deshifrovaniya-aes-gcm","title":{"rendered":"Un ensemble de patchs pour acc\u00e9l\u00e9rer le chiffrement\/d\u00e9chiffrement AES-GCM.","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

\"Un <\/p>\n

Le 2 juin, Eric Biggers (ing\u00e9nieur chez Google) a pr\u00e9sent\u00e9 de nouvelles impl\u00e9mentations de l'AES-XTS pour des performances sensiblement am\u00e9lior\u00e9es des processeurs Intel\/AMD gr\u00e2ce \u00e0 de nouveaux ensembles d'instructions AES-NI + AVX, VAES + AVX2, VAES + AVX10\/256 et VAES + AVX10\/512.<\/p>\n

Le code AES-NI GCM remplace l'ancien code d\u00e9velopp\u00e9 par Intel et corrige les probl\u00e8mes identifi\u00e9s.<\/p>\n

\n

\u00abCet ensemble de mises \u00e0 jour ajoute dans VAES et AVX512\/AVX10 une impl\u00e9mentation AES-GCM (mode Galois\/Counter), ce qui am\u00e9liore la performance d'AES-GCM jusqu'\u00e0 162 %. De plus, il remplace l'ancien code AES-NI GCM d'Intel par un nouveau code, qui est l\u00e9g\u00e8rement plus rapide et corrige plusieurs probl\u00e8mes, y compris la taille \u00e9norme du fichier binaire d\u00e9passant 250 Ko. Pour plus de d\u00e9tails, voir les corrections.<\/p>\n<\/blockquote>\n

\n

L'\u00e9tat final du code assembleur x86_64 AES-GCM est que nous obtenons deux fichiers assembleurs : l'un g\u00e9n\u00e8re du code AES-NI avec AVX ou sans, et l'autre g\u00e9n\u00e8re du code VAES avec AVX512\/AVX10 utilisant des vecteurs de 256 bits ou 512 bits. Il n'inclut pas de support pour VAES seul (sans AVX512\/AVX10). Cela diff\u00e8re l\u00e9g\u00e8rement de ce que j'ai fait avec AES-XTS, o\u00f9 un fichier g\u00e9n\u00e8re du code AVX et le code AVX512\/AVX10, y compris du code qui n'utilise que VAES (sans AVX512\/AVX10), tandis que l'autre fichier g\u00e9n\u00e8re uniquement du code autre que AVX. Cependant, pour le moment, cela semble \u00eatre le bon choix pour chaque algorithme en particulier, \u00e9tant donn\u00e9 que la limite de 16 registres SIMD et de vecteurs de 128 bits a conduit \u00e0 des d\u00e9cisions constructives sensiblement diff\u00e9rentes dans AES-GCM, mais pas autant pour AES-XTS. Les processeurs \u00e9quip\u00e9s uniquement de VAES semblent \u00e9galement \u00eatre un ph\u00e9nom\u00e8ne temporaire, donc nous ne devrions peut-\u00eatre pas trop nous efforcer de prendre en charge cette combinaison.\u00bb<\/p>\n<\/blockquote>\n

Source : linux.org.ru<\/a><\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"

2 \u0438\u044e\u043d\u044f \u042d\u0440\u0438\u043a \u0411\u0438\u0433\u0433\u0435\u0440\u0441 (\u0438\u043d\u0436\u0435\u043d\u0435\u0440 \u0438\u0437 Google) \u043f\u0440\u0435\u0434\u0441\u0442\u0430\u0432\u0438\u043b \u043d\u043e\u0432\u044b\u0435 \u0440\u0435\u0430\u043b\u0438\u0437\u0430\u0446\u0438\u0438 AES-XTS \u0434\u043b\u044f \u0433\u043e\u0440\u0430\u0437\u0434\u043e \u0431\u043e\u043b\u0435\u0435 \u0432\u044b\u0441\u043e\u043a\u043e\u0439 \u043f\u0440\u043e\u0438\u0437\u0432\u043e\u0434\u0438\u0442\u0435\u043b\u044c\u043d\u043e\u0441\u0442\u0438 \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u043e\u0440\u043e\u0432 Intel\/AMD \u0441 \u043f\u043e\u043c\u043e\u0449\u044c\u044e \u043d\u043e\u0432\u044b\u0445 \u043d\u0430\u0431\u043e\u0440\u043e\u0432 \u043a\u043e\u0434\u0430 AES-NI + AVX, VAES + AVX2, VAES + AVX10\/256 \u0438 VAES + AVX10\/512. \u041a\u043e\u0434 AES-NI GCM \u0437\u0430\u043c\u0435\u043d\u044f\u0435\u0442 \u0441\u043e\u0431\u043e\u0439 \u043f\u0440\u0435\u0434\u044b\u0434\u0443\u0449\u0438\u0439, \u043d\u0430\u043f\u0438\u0441\u0430\u043d\u043d\u044b\u0439 Intel, \u0438 \u0443\u0441\u0442\u0440\u0430\u043d\u044f\u0435\u0442 \u0441\u0443\u0449\u0435\u0441\u0442\u0432\u0443\u044e\u0449\u0438\u0435 \u0432\u044b\u044f\u0432\u043b\u0435\u043d\u043d\u044b\u0435 \u043f\u0440\u043e\u0431\u043b\u0435\u043c\u044b: «\u042d\u0442\u043e\u0442 \u043d\u0430\u0431\u043e\u0440 \u043e\u0431\u043d\u043e\u0432\u043b\u0435\u043d\u0438\u0439 \u0434\u043e\u0431\u0430\u0432\u043b\u044f\u0435\u0442 \u0432 VAES […]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":116367,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[702],"tags":[],"class_list":["post-116366","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news"],"aioseo_notices":[],"aioseo_head":"\n\t\t\n\t\n\t\n\t\n\t\n\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\n","aioseo_head_json":{"title":"\ud83e\udd47 Ensemble de correctifs pour acc\u00e9l\u00e9rer le chiffrement\/d\u00e9chiffrement AES-GCM | ProHoster","description":"Le 2 juin, Eric Biggers (ing\u00e9nieur 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