{"id":144103,"date":"2025-10-04T11:12:05","date_gmt":"2025-10-04T09:12:05","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/vypusk-zluda-5-universalnoj-otkrytoj-realizaczii-tehnologii-cuda"},"modified":"2025-10-04T11:12:05","modified_gmt":"2025-10-04T09:12:05","slug":"vypusk-zluda-5-universalnoj-otkrytoj-realizaczii-tehnologii-cuda","status":"publish","type":"post","link":"https:\/\/prohoster.info\/fr\/blog\/news\/vypusk-zluda-5-universalnoj-otkrytoj-realizaczii-tehnologii-cuda","title":{"rendered":"Lancement de ZLUDA 5, une impl\u00e9mentation ouverte universelle de la technologie CUDA","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"<p>Andrzej Janik a pr\u00e9sent\u00e9 la version ZLUDA 5, une impl\u00e9mentation open-source de la technologie CUDA. L'objectif du projet est de permettre l'ex\u00e9cution d'applications CUDA non modifi\u00e9es sur des syst\u00e8mes avec des GPU diff\u00e9rents de ceux de NVIDIA, offrant des performances proches de celles des applications ex\u00e9cut\u00e9es sans couches. Le code du projet est \u00e9crit en Rust et est distribu\u00e9 sous les licences MIT et Apache 2.0.       <\/p>\n<p>ZLUDA 5 est devenu la deuxi\u00e8me version majeure du projet, form\u00e9e apr\u00e8s le nettoyage de la base de code des \u00e9l\u00e9ments d\u00e9velopp\u00e9s pendant le passage d'Andrzej chez AMD. Depuis 2022, Andrzej travaillait chez AMD sur la cr\u00e9ation d'une couche de compatibilit\u00e9 pour les GPU AMD avec CUDA, mais en 2024, le projet a \u00e9t\u00e9 interrompu. Conform\u00e9ment aux conditions du contrat et apr\u00e8s obtention de l'autorisation de publication de la part d'un repr\u00e9sentant d'AMD, Andrzej a ouvert le code des travaux r\u00e9alis\u00e9s pendant son temps chez AMD, permettant l'ex\u00e9cution d'applications CUDA au-dessus de la pile ROCm et de l'environnement d'ex\u00e9cution HIP (Heterogeneous-computing Interface for Portability).     <\/p>\n<p>L'ann\u00e9e derni\u00e8re, Andrzej a \u00e9t\u00e9 contraint de retirer le code de l'acc\u00e8s public apr\u00e8s un courrier des avocats, indiquant que l'autorisation donn\u00e9e lors des \u00e9changes par email n'avait aucune valeur juridique. Par la suite, Andrzej a commenc\u00e9 \u00e0 travailler sur une nouvelle \u00e9dition de ZLUDA, bas\u00e9e sur la base de code existante avant le d\u00e9but de son travail chez AMD. Dans sa forme actuelle, le d\u00e9veloppement est concentr\u00e9 sur l'ex\u00e9cution d'applications utilisant CUDA pour acc\u00e9l\u00e9rer des t\u00e2ches li\u00e9es \u00e0 l'apprentissage machine. Le projet se limite pour l'instant au fonctionnement sur des GPU AMD, mais sera prochainement adapt\u00e9 pour les GPU Intel.       <\/p>\n<p>Am\u00e9liorations cl\u00e9s dans la nouvelle version :  <\/p>\n<ul>\n<li class=\"l\"> Ajout d'un support initial pour l'ex\u00e9cution sur ZLUDA des frameworks llm.c, Llama.cpp et PyTorch pour ex\u00e9cuter de grands mod\u00e8les linguistiques utilisant des optimisations CUDA, applicables aux GPU NVIDIA.\n<li class=\"l\"> Impl\u00e9mentation d'un support initial pour l'ex\u00e9cution d'applications utilisant les biblioth\u00e8ques cuBLAS, cuBLASLt et nvml pour am\u00e9liorer les performances.\n<li class=\"l\"> Ajout de la couche zluda_trace pour le tra\u00e7age des applications utilisant CUDA. Avec zluda_trace, il est possible de diagnostiquer des probl\u00e8mes et d'identifier des lacunes dans ZLUDA qui emp\u00eachent le bon fonctionnement de l'application.\n<li class=\"l\"> Un utilitaire en ligne de commande zoc (compilateur hors ligne ZLUDA) a \u00e9t\u00e9 pr\u00e9sent\u00e9, permettant de compiler des fichiers d'instructions NVIDIA PTX en une repr\u00e9sentation interm\u00e9diaire AMD RDNA (auparavant, cette fonctionnalit\u00e9 \u00e9tait disponible sous forme de fonctions de biblioth\u00e8que).\n<li class=\"l\"> Dans le chargeur de modules PTX, un m\u00e9canisme de mise en cache des c\u0153urs ex\u00e9cut\u00e9s sur le GPU a \u00e9t\u00e9 mis en place. La mise en cache permet d'\u00e9viter la r\u00e9p\u00e9tition des op\u00e9rations co\u00fbteuses de compilation des instructions PTX (Parallel Thread Execution) en code machine pour un GPU donn\u00e9.<br \/>\n<br \/>Source : <a content=\"nofollow\" rel=\"nofollow\" href=\"https:\/\/www.opennet.ru\/opennews\/art.shtml?num=63997\">opennet.ru<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"<p>\u0410\u043d\u0434\u0436\u0435\u0439 \u042f\u043d\u0438\u043a (Andrzej Janik) \u043f\u0440\u0435\u0434\u0441\u0442\u0430\u0432\u0438\u043b \u0432\u044b\u043f\u0443\u0441\u043a ZLUDA 5, \u043e\u0442\u043a\u0440\u044b\u0442\u043e\u0439 \u0440\u0435\u0430\u043b\u0438\u0437\u0430\u0446\u0438\u0438 \u0442\u0435\u0445\u043d\u043e\u043b\u043e\u0433\u0438\u0438 CUDA. \u0426\u0435\u043b\u044c\u044e \u043f\u0440\u043e\u0435\u043a\u0442\u0430 \u044f\u0432\u043b\u044f\u0435\u0442\u0441\u044f \u043f\u0440\u0435\u0434\u043e\u0441\u0442\u0430\u0432\u043b\u0435\u043d\u0438\u0435 \u0432\u043e\u0437\u043c\u043e\u0436\u043d\u043e\u0441\u0442\u0438 \u0437\u0430\u043f\u0443\u0441\u043a\u0430 \u043d\u0435\u043c\u043e\u0434\u0438\u0444\u0438\u0446\u0438\u0440\u043e\u0432\u0430\u043d\u043d\u044b\u0445 \u043f\u0440\u0438\u043b\u043e\u0436\u0435\u043d\u0438\u0439 CUDA \u043d\u0430 \u0441\u0438\u0441\u0442\u0435\u043c\u0430\u0445 \u0441 GPU, \u043e\u0442\u043b\u0438\u0447\u043d\u044b\u043c\u0438 \u043e\u0442 GPU NVIDIA, \u0441 \u043f\u0440\u043e\u0438\u0437\u0432\u043e\u0434\u0438\u0442\u0435\u043b\u044c\u043d\u043e\u0441\u0442\u044c\u044e, \u0431\u043b\u0438\u0437\u043a\u043e\u0439 \u043a \u043f\u0440\u043e\u0438\u0437\u0432\u043e\u0434\u0438\u0442\u0435\u043b\u044c\u043d\u043e\u0441\u0442\u0438 \u043f\u0440\u0438\u043b\u043e\u0436\u0435\u043d\u0438\u0439, \u0432\u044b\u043f\u043e\u043b\u043d\u044f\u0435\u043c\u044b\u0445 \u0431\u0435\u0437 \u043f\u0440\u043e\u0441\u043b\u043e\u0435\u043a. \u041a\u043e\u0434 \u043f\u0440\u043e\u0435\u043a\u0442\u0430 \u043d\u0430\u043f\u0438\u0441\u0430\u043d \u043d\u0430 \u044f\u0437\u044b\u043a\u0435 Rust \u0438 \u0440\u0430\u0441\u043f\u0440\u043e\u0441\u0442\u0440\u0430\u043d\u044f\u0435\u0442\u0441\u044f \u043f\u043e\u0434 \u043b\u0438\u0446\u0435\u043d\u0437\u0438\u044f\u043c\u0438 MIT \u0438 Apache 2.0. ZLUDA 5 \u0441\u0442\u0430\u043b [&hellip;]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[702],"tags":[],"class_list":["post-144103","post","type-post","status-publish","format-standard","hentry","category-news"],"aioseo_notices":[],"aioseo_head":"\n\t\t<!-- All in One SEO 5.0.2 - aioseo.com -->\n\t<meta name=\"description\" content=\"\u0410\u043d\u0434\u0436\u0435\u0439 \u042f\u043d\u0438\u043a (Andrzej Janik) \u043f\u0440\u0435\u0434\u0441\u0442\u0430\u0432\u0438\u043b \u0432\u044b\u043f\u0443\u0441\u043a ZLUDA 5, \u043e\u0442\u043a\u0440\u044b\u0442\u043e\u0439 \u0440\u0435\u0430\u043b\u0438\u0437\u0430\u0446\u0438\u0438 \u0442\u0435\u0445\u043d\u043e\u043b\u043e\u0433\u0438\u0438 CUDA.\" \/>\n\t<meta name=\"robots\" content=\"max-image-preview:large\" \/>\n\t<meta name=\"author\" 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