{"id":36907,"date":"2019-10-31T22:14:40","date_gmt":"2019-10-31T19:14:40","guid":{"rendered":"https:\/\/prohoster.info\/blog\/predstavlena-pervaya-sovremennaya-servernaya-platforma-na-baze-coreboot\/"},"modified":"2019-10-31T22:14:40","modified_gmt":"2019-10-31T19:14:40","slug":"predstavlena-pervaya-sovremennaya-servernaya-platforma-na-baze-coreboot","status":"publish","type":"post","link":"https:\/\/prohoster.info\/fr\/blog\/news\/predstavlena-pervaya-sovremennaya-servernaya-platforma-na-baze-coreboot","title":{"rendered":"Premi\u00e8re plateforme serveur moderne bas\u00e9e sur CoreBoot pr\u00e9sent\u00e9e","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"<p>Les d\u00e9veloppeurs de l'entreprise 9elements <noindex><a rel=\"nofollow\" href=\"https:\/\/9esec.io\/blog\/first-modern-coreboot-server-platform\/\">ont port\u00e9<\/a><\/noindex> CoreBoot pour la carte m\u00e8re serveur Supermicro <noindex><a rel=\"nofollow\" href=\"https:\/\/www.supermicro.com\/en\/products\/motherboard\/X11SSH-TF\">X11SSH-TF<\/a><\/noindex>. Les modifications ont d\u00e9j\u00e0 <noindex><a rel=\"nofollow\" href=\"https:\/\/review.coreboot.org\/c\/coreboot\/+\/32734\/67\">est inclus<\/a><\/noindex> \u00e9t\u00e9 int\u00e9gr\u00e9es dans la base de code principale de CoreBoot et figureront dans la prochaine version majeure. La Supermicro X11SSH-TF est devenue la premi\u00e8re carte m\u00e8re serveur moderne avec un processeur Intel Xeon \u00e0 pouvoir \u00eatre utilis\u00e9e avec CoreBoot. La carte prend en charge les processeurs Xeon (E3-1200V6 Kabylake-S ou E3-1200V5 Skylake-S) et peut \u00eatre \u00e9quip\u00e9e jusqu'\u00e0 64 Go de RAM (4 x UDIMM DDR4 2400MHz).<\/p>\n<p>Le travail a \u00e9t\u00e9 effectu\u00e9 <noindex><a rel=\"nofollow\" href=\"https:\/\/www.mullvad.net\/de\/blog\/2019\/8\/7\/open-source-firmware-future\/\">en collaboration<\/a><\/noindex> avec le fournisseur VPN Mullvad dans le cadre du projet <noindex><a rel=\"nofollow\" href=\"https:\/\/www.mullvad.net\/media\/system-transparency-rev5.pdf\">System Transparency<\/a><\/noindex>, visant \u00e0 renforcer la s\u00e9curit\u00e9 de l'infrastructure serveur et \u00e0 \u00e9liminer les composants propri\u00e9taires dont l'\u00e9tat est impossible \u00e0 contr\u00f4ler. CoreBoot est l'alternative libre des firmwares propri\u00e9taires et est disponible pour v\u00e9rification et audit complets. CoreBoot est utilis\u00e9 comme firmware de base pour initialiser le mat\u00e9riel et coordonner le d\u00e9marrage initial. L'initialisation des puces graphiques, PCIe, SATA, USB, RS232 est ainsi mise en \u0153uvre. De plus, CoreBoot int\u00e8gre des composants binaires FSP 2.0 (Intel Firmware Support Package) et un firmware binaire pour le sous-syst\u00e8me Intel ME, n\u00e9cessaires pour initialiser et faire fonctionner le CPU et le chipset.<\/p>\n<p>Pour le chargement du syst\u00e8me d'exploitation, il est recommand\u00e9 d'utiliser <noindex><a rel=\"nofollow\" href=\"https:\/\/seabios.org\/\">SeaBios<\/a><\/noindex> ou <noindex><a rel=\"nofollow\" href=\"https:\/\/www.opennet.ru\/opennews\/art.shtml?num=47965\">LinuxBoot<\/a><\/noindex> (la mise en \u0153uvre de l'UEFI bas\u00e9e sur <noindex><a rel=\"nofollow\" href=\"https:\/\/www.opennet.ru\/opennews\/art.shtml?num=35979\">Tianocore<\/a><\/noindex> n'est pas encore support\u00e9e en raison d'incompatibilit\u00e9s avec le sous-syst\u00e8me graphique Aspeed NGI, ne fonctionnant qu'en mode texte). En plus d'ajouter la prise en charge de la carte dans CoreBoot, les participants au projet ont \u00e9galement mis en \u0153uvre la prise en charge des modules TPM (Trusted Platform Module) 1.2\/2.0 bas\u00e9s sur Intel ME et pr\u00e9par\u00e9 un driver pour le contr\u00f4leur ASPEED 2400 SuperI\/O, faisant office de BMC (Baseboard Management Controller). <\/p>\n<p>Pour la gestion \u00e0 distance de la carte, l'interface IPMI fournie par le contr\u00f4leur BMC AST2400 est op\u00e9rationnelle, mais l'utilisation de l'IPMI n\u00e9cessite l'installation du firmware d'origine dans le contr\u00f4leur BMC. La fonctionnalit\u00e9 de d\u00e9marrage v\u00e9rifi\u00e9 a \u00e9galement \u00e9t\u00e9 mise en \u0153uvre. L'utilitaire <noindex><a rel=\"nofollow\" href=\"https:\/\/www.coreboot.org\/Superiotool\">superiotool<\/a><\/noindex> a ajout\u00e9 la prise en charge de l'AST2400, tandis que dans  <noindex><a rel=\"nofollow\" href=\"https:\/\/www.coreboot.org\/Inteltool\">inteltool<\/a><\/noindex> la prise en charge d'Intel Xeon E3-1200. Intel SGX (Software Guard Extensions) n'est pas encore support\u00e9 en raison de probl\u00e8mes de stabilit\u00e9. <\/p>\n<p><noindex><a rel=\"nofollow\" name=\"link\"><\/a><\/noindex><\/p>\n<p>Source : <a \ncontent=\"nofollow\" rel=\"nofollow\" href=\"https:\/\/www.opennet.ru\/opennews\/art.shtml?num=51240\">opennet.ru<\/a><\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"<p>\u0420\u0430\u0437\u0440\u0430\u0431\u043e\u0442\u0447\u0438\u043a\u0438 \u0438\u0437 \u043a\u043e\u043c\u043f\u0430\u043d\u0438\u0438 9elements \u043f\u043e\u0440\u0442\u0438\u0440\u043e\u0432\u0430\u043b\u0438 CoreBoot \u0434\u043b\u044f \u0441\u0435\u0440\u0432\u0435\u0440\u043d\u043e\u0439 \u043c\u0430\u0442\u0435\u0440\u0438\u043d\u0441\u043a\u043e\u0439 \u043f\u043b\u0430\u0442\u044b Supermicro X11SSH-TF. \u0418\u0437\u043c\u0435\u043d\u0435\u043d\u0438\u044f \u0443\u0436\u0435 \u0432\u043a\u043b\u044e\u0447\u0435\u043d\u044b \u0432 \u043e\u0441\u043d\u043e\u0432\u043d\u0443\u044e \u043a\u043e\u0434\u043e\u0432\u0443\u044e \u0431\u0430\u0437\u0443 CoreBoot \u0438 \u0432\u043e\u0439\u0434\u0443\u0442 \u0432 \u0441\u043e\u0441\u0442\u0430\u0432 \u0441\u043b\u0435\u0434\u0443\u044e\u0449\u0435\u0433\u043e \u0437\u043d\u0430\u0447\u0438\u0442\u0435\u043b\u044c\u043d\u043e\u0433\u043e \u0432\u044b\u043f\u0443\u0441\u043a\u0430. Supermicro X11SSH-TF \u0441\u0442\u0430\u043b\u0430 \u043f\u0435\u0440\u0432\u043e\u0439 \u0441\u043e\u0432\u0440\u0435\u043c\u0435\u043d\u043d\u043e\u0439 \u0441\u0435\u0440\u0432\u0435\u0440\u043d\u043e\u0439 \u043c\u0430\u0442\u0435\u0440\u0438\u043d\u0441\u043a\u043e\u0439 \u043f\u043b\u0430\u0442\u043e\u0439 \u0441 \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u043e\u0440\u043e\u043c Intel Xeon, \u043a\u043e\u0442\u043e\u0440\u0443\u044e \u043c\u043e\u0436\u043d\u043e \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u0442\u044c \u0441 CoreBoot. \u041f\u043b\u0430\u0442\u0430 \u043f\u043e\u0434\u0434\u0435\u0440\u0436\u0438\u0432\u0430\u0435\u0442 \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u043e\u0440\u044b Xeon (E3-1200V6 Kabylake-S \u0438\u043b\u0438 E3-1200V5 Skylake-S) \u0438 \u043c\u043e\u0436\u0435\u0442 [&hellip;]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[702],"tags":[],"class_list":["post-36907","post","type-post","status-publish","format-standard","hentry","category-news"],"aioseo_notices":[],"aioseo_head":"\n\t\t<!-- All in One SEO 5.0.2.1 - aioseo.com -->\n\t<meta name=\"description\" content=\"\u0420\u0430\u0437\u0440\u0430\u0431\u043e\u0442\u0447\u0438\u043a\u0438 \u0438\u0437 \u043a\u043e\u043c\u043f\u0430\u043d\u0438\u0438 9elements \u043f\u043e\u0440\u0442\u0438\u0440\u043e\u0432\u0430\u043b\u0438 CoreBoot \u0434\u043b\u044f \u0441\u0435\u0440\u0432\u0435\u0440\u043d\u043e\u0439 \u043c\u0430\u0442\u0435\u0440\u0438\u043d\u0441\u043a\u043e\u0439 \u043f\u043b\u0430\u0442\u044b Supermicro.\" \/>\n\t<meta name=\"robots\" content=\"max-image-preview:large\" \/>\n\t<meta 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