{"id":54142,"date":"2019-12-19T00:00:00","date_gmt":"2019-12-18T21:00:00","guid":{"rendered":"https:\/\/prohoster.info\/blog\/blog_prohoster\/utechka-podtverzhdaet-uvelichenie-kesha-vtorogo-urovnya-u-budushhih-protsessorov-intel"},"modified":"2020-02-18T14:02:07","modified_gmt":"2020-02-18T11:02:07","slug":"utechka-podtverzhdaet-uvelichenie-kesha-vtorogo-urovnya-u-budushhih-protsessorov-intel","status":"publish","type":"post","link":"https:\/\/prohoster.info\/fr\/blog\/news\/utechka-podtverzhdaet-uvelichenie-kesha-vtorogo-urovnya-u-budushhih-protsessorov-intel","title":{"rendered":"La fuite confirme l'augmentation de la m\u00e9moire cache de niveau 2 des futurs processeurs Intel.","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

La base de donn\u00e9es du test de performance SiSoftware a r\u00e9v\u00e9l\u00e9 un enregistrement concernant un test de serveur ou de station de travail construit sur deux myst\u00e9rieux processeurs Intel \u00e0 six c\u0153urs. Ces processeurs sont particuli\u00e8rement int\u00e9ressants en raison de leur capacit\u00e9 de cache de niveau 2 plut\u00f4t inhabituelle de 1,25 Mo par c\u0153ur.<\/p>\n

\"La<\/p>\n

C'est cinq fois plus que les 256 Ko de cache L2 des processeurs de bureau Coffee Lake Refresh, et deux fois et demie plus que les derniers puces Ice Lake-U, qui disposent de 512 Ko par c\u0153ur. C'est \u00e9galement 25 % de plus que les actuels processeurs HEDT Core-X ou les Xeon Scalable pour serveurs, qui ont chacun 1 Mo de cache de niveau 2 par c\u0153ur.<\/p>\n

\"La<\/p>\n

Il en d\u00e9coule naturellement que ce processeur utilise l'une des nouvelles architectures d'Intel. Il pourrait s'agir des Ice Lake ou Tiger Lake en 10 nm, ou de Rocket Lake en 14 nm. Actuellement, on sait peu de choses sur les deux derni\u00e8res architectures, mais l'une des r\u00e9centes fuites<\/a><\/noindex> concernant Tiger Lake \u00e9voquait pr\u00e9cis\u00e9ment la pr\u00e9sence de 1,25 Mo de cache de niveau 2 par c\u0153ur.<\/p>\n

En m\u00eame temps, une autre fuite<\/a><\/noindex> indiquait que la famille Tiger Lake ne pr\u00e9sentera que des processeurs mobiles, dot\u00e9s de pas plus de quatre c\u0153urs. En revanche, les puces Rocket Lake proposeront jusqu'\u00e0 huit c\u0153urs. De plus, les puces \u00e0 six c\u0153urs test\u00e9es par SiSoftware ont moins de cache de niveau 3 que le Tiger Lake ayant 'fuit\u00e9' pr\u00e9c\u00e9demment.<\/p>\n

<\/center><\/p>\n

On peut alors supposer que la capacit\u00e9 de cache L3 r\u00e9duite pourrait \u00eatre le r\u00e9sultat d'un agencement moins dense des transistors, c'est-\u00e0-dire d'un processus technologique 'plus gros'. Il ne faut pas exclure que nous assistions ici \u00e0 un transfert d'architecture d'un processus technologique 'plus fin' de 10 nm vers l'ancien bon 14 nm. R\u00e9cemment, c'\u00e9tait justement le cas. il a \u00e9t\u00e9 signal\u00e9<\/a><\/noindex>indiqu\u00e9 que Rocket Lake utilisera une nouvelle architecture, mais sur un ancien processus technologique.<\/p>\n

\"La<\/p>\n

Il existe aussi une autre option : tout ce qui a \u00e9t\u00e9 d\u00e9crit dans les deux paragraphes pr\u00e9c\u00e9dents pourrait ne pas se r\u00e9aliser, et nous aurions un syst\u00e8me sur deux processeurs serveurs Ice Lake-SP en 10 nm. Ils pourraient tout \u00e0 fait disposer des m\u00eames c\u0153urs que les Ice Lake-U mobiles, mais chaque c\u0153ur aurait plus de cache de niveau 2. Pour Intel, une telle pratique n'est pas nouvelle.<\/p>\n

Dans l'ensemble, il est difficile de tirer des conclusions concr\u00e8tes bas\u00e9es sur ce r\u00e9sultat. Comme vous le voyez, il y a de nombreuses possibilit\u00e9s, mais peu de preuves. Une seule chose ne fait aucun doute : ces processeurs \u00e0 six c\u0153urs ne d\u00e9rivent pas de Skylake.<\/p>\n

<\/p>\n

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Source : 3dnews.ru<\/a><\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"

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[…]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[702],"tags":[],"class_list":["post-54142","post","type-post","status-publish","format-standard","hentry","category-news"],"aioseo_notices":[],"aioseo_head":"\n\t\t\n\t\n\t\n\t\n\t\n\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\n","aioseo_head_json":{"title":"\ud83e\udd47La fuite confirme l'augmentation du cache de niveau deux des futurs processeurs Intel | ProHoster","description":"La base de donn\u00e9es du test de performance SiSoftware a enregistr\u00e9 le test d'un serveur ou d'une station de travail construit sur deux processeurs Intel \u00e0 six c\u0153urs myst\u00e9rieux.","canonical_url":"https:\/\/prohoster.info\/fr\/blog\/news\/utechka-podtverzhdaet-uvelichenie-kesha-vtorogo-urovnya-u-budushhih-protsessorov-intel","robots":"max-image-preview:large","keywords":"","webmasterTools":{"miscellaneous":""},"schema":null,"og:locale":"fr_FR","og:site_name":"ProHoster | \u041a\u0443\u043f\u0438\u0442\u044c \u043d\u0430\u0434\u0435\u0436\u043d\u044b\u0439 \u0445\u043e\u0441\u0442\u0438\u043d\u0433 \u0434\u043b\u044f \u0441\u0430\u0439\u0442\u043e\u0432 \u0441 \u0437\u0430\u0449\u0438\u0442\u043e\u0439 \u043e\u0442 DDoS, VPS VDS \u0441\u0435\u0440\u0432\u0435\u0440\u044b","og:type":"article","og:title":"\ud83e\udd47\u0423\u0442\u0435\u0447\u043a\u0430 \u043f\u043e\u0434\u0442\u0432\u0435\u0440\u0436\u0434\u0430\u0435\u0442 \u0443\u0432\u0435\u043b\u0438\u0447\u0435\u043d\u0438\u0435 \u043a\u0435\u0448\u0430 \u0432\u0442\u043e\u0440\u043e\u0433\u043e \u0443\u0440\u043e\u0432\u043d\u044f \u0443 \u0431\u0443\u0434\u0443\u0449\u0438\u0445 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