Na dogon lokaci
Kwararrun CEA-Leti don Fasahar Fasaha & Da'ira 2020 na VLSI
Samsung, kamar yadda muka sani, tare da fara samar da kwakwalwan kwamfuta na 3-nm, yana shirin samar da transistor GAA guda biyu tare da tashoshi masu lebur guda biyu (nanopages) wanda ke saman ɗayan, kewaye da kofa a kowane bangare. Kwararrun CEA-Leti sun nuna cewa yana yiwuwa a samar da transistor tare da tashoshi na nanopage guda bakwai kuma a lokaci guda saita tashoshi zuwa girman da ake buƙata. Misali, an fitar da transistor GAA na gwaji tare da tashoshi bakwai a nau'ikan da ke da faɗin 15 nm zuwa 85 nm. A bayyane yake cewa wannan yana ba ku damar saita madaidaicin halaye don transistor kuma tabbatar da maimaita su (rage yaduwar sigogi).
Dangane da Faransanci, ƙarin matakan tashoshi a cikin transistor GAA, mafi girman fa'ida mai tasiri na jimlar tashar kuma, don haka, mafi kyawun ikon sarrafa transistor. Hakanan, a cikin tsarin multilayer akwai ƙarancin ɗigogi na halin yanzu. Misali, transistor GAA mai matakin bakwai yana da raguwar zubewa sau uku fiye da na matakin biyu (dan kadan, kamar Samsung GAA). To, a ƙarshe masana'antar ta sami hanyar sama, tana nisa daga jeri a kwance na abubuwa akan guntu zuwa tsaye. Da alama microcircuits ba zai ƙara yawan yankin lu'ulu'u ba don ya zama ma sauri, mafi ƙarfi da ƙarfin kuzari.
source: 3dnews.ru