Aikin VeriGPU yana nufin ƙirƙirar GPU mai buɗewa wanda aka haɓaka a cikin yaren Verilog don siffantawa da ƙirar tsarin lantarki. Da farko, ana yin aikin ne ta hanyar amfani da na'urar kwaikwayo ta Verilog, amma da zarar an kammala shi za a iya amfani da shi don kera na'urar kwakwalwan kwamfuta na gaske. Ana rarraba ci gaban aikin a ƙarƙashin lasisin MIT.
An sanya VeriGPU azaman ƙayyadaddun kayan masarufi na musamman (ASIC) don haɓaka ƙididdiga masu alaƙa da tsarin koyon injin. Tsare-tsare sun haɗa da dacewa tare da tsarin ilmantarwa mai zurfi na PyTorch da ikon haɓaka aikace-aikace don VeriGPU ta amfani da HIP (Harshen-Compute Interface) API. A nan gaba, yana yiwuwa a ƙara tallafi don wasu APIs, kamar SYCL da NVIDIA CUDA.
GPU ya samo asali ne daga tsarin koyarwa na RISC-V, amma sakamakon gine-gine na ciki na tsarin koyarwar GPU yana da rauni da jituwa tare da RISC-V ISA, tun da yake a cikin yanayi inda ƙirar GPU ba ta dace da wakilcin RISC-V ba, yana da rauni. ba a yi niyya don kiyaye dacewa da RISC-V ba. Ci gaban yana mayar da hankali ne akan damar da ake buƙata don tsarin ilmantarwa na na'ura, don haka don rage girman da rikitarwa na matrix guntu, yana amfani da tsarin BF16 kawai kuma kawai ayyukan da ake buƙata don koyon inji, kamar exp, log, tanh da sqrt, suna samuwa.
Daga cikin abubuwan da aka riga aka samu akwai mai kula da GPU, APU (Sauran Haɗakarwa) don ayyukan intiger ("+","","/,"*"), da naúrar ayyukan ayyukan iyo ("+," ”*”) da kuma katangar reshe. Don ƙirƙirar aikace-aikace, yana ba da mai haɗawa da goyan baya don haɗa lambar C++ bisa LLVM. Daga cikin abubuwan da aka tsara, aiwatar da umarni guda ɗaya, caching na bayanai da ƙwaƙwalwar koyarwa, da kuma ayyukan SIMT (Tsarin umarni guda ɗaya) an ba da haske.
source: budenet.ru