Kamfanin Rostec State Corporation da kamfanin fasahar Yadro (ICS Holding) sun yi niyyar haɓaka da fara samar da sabon na'ura mai sarrafa kwamfuta don kwamfyutocin kwamfyutoci, PC da sabobin, bisa tsarin gine-ginen RISC-V, nan da 2025. An shirya don ba da kayan aiki a cikin sassan Rostec da cibiyoyin Ma'aikatar Ilimi da Kimiyya, Ma'aikatar Ilimi da Ma'aikatar Lafiya ta Tarayyar Rasha tare da kwamfutoci bisa sabon na'ura. 27,8 biliyan rubles za a zuba jari a cikin aikin (ciki har da 9,8 biliyan daga tarayya kasafin kudin), wanda shi ne fiye da jimlar zuba jari a samar da Elbrus da Baikal sarrafawa. Dangane da tsarin kasuwanci, a cikin 2025 sun shirya siyar da tsarin 60 bisa sabbin na'urori kuma suna samun 7 biliyan rubles don wannan.
Tun daga 2019, Yadro, uwar garken da kamfanin ajiya, ya mallaki Syntacore, wanda shine ɗayan tsofaffin masu haɓaka RISC-V IP na ƙwararrun buɗaɗɗe da kasuwanci (IP Core), kuma yana ɗaya daga cikin waɗanda suka kafa ƙungiyar masu zaman kansu. RISC-V International , kula da ci gaban RISC-V umarni saitin gine-gine. Don haka, akwai wadatattun albarkatu, ƙwarewa da ƙwarewa don ƙirƙirar sabon guntu RISC-V.
An ba da rahoton cewa guntu da ake haɓakawa zai haɗa da na'ura mai mahimmanci 8-core mai aiki a 2 GHz. Don samarwa an shirya yin amfani da tsarin fasaha na 12nm (don kwatanta, a cikin 2023 Intel yana shirin samar da guntu dangane da SiFive P550 RISC-V core ta amfani da fasahar 7 nm, kuma a cikin 2022 a China ana sa ran samar da guntun XiangShan. , kuma yana aiki a mitar 2 GHz, ta amfani da tsarin fasaha 14 nm).
Syntacore a halin yanzu yana ba da lasisi don RISC-V SCR7 core, dacewa don amfani a cikin kwamfutocin mabukaci da tallafawa amfani da tsarin tushen Linux. SCR7 yana aiwatar da tsarin saiti na umarni na RISC-V RV64GC kuma ya haɗa da mai sarrafa ƙwaƙwalwar ajiya mai ƙima tare da tallafin shafi na ƙwaƙwalwar ajiya, MMU, L1/L2 caches, naúrar mai iyo, matakan gata guda uku, AXI4- da ACE masu dacewa da musaya, da tallafin SMP (har zuwa 8 nuclei).
Dangane da software, ana samun nasarar haɓaka tallafin RISC-V a cikin Debian GNU/Linux. Bugu da kari, a karshen watan Yuni, Canonical ya sanar da samar da shirye-shiryen gina Ubuntu 20.04 LTS da 21.04 don allon RISC-V SiFive HiFive Unmatched da SiFive HiFive Unleashed. RISC-V shima kwanan nan an tura shi zuwa dandamalin Android. Abin lura ne cewa Yadro ya kasance memba na Azurfa na Linux Foundation tun 2017, kuma shi ma memba ne na ƙungiyar OpenPOWER Foundation, wanda ke haɓaka OpenPOWER instruction set architecture (ISA).
Ka tuna cewa RISC-V yana ba da tsarin koyarwa na inji mai sassauƙa wanda ke ba da damar gina na'urori masu sarrafawa don aikace-aikacen sabani ba tare da buƙatar biyan kuɗi ko sanya sharuɗɗan amfani ba. RISC-V yana ba ku damar ƙirƙirar SoCs da na'urori masu sarrafawa gabaɗaya. A halin yanzu, dangane da ƙayyadaddun RISC-V, kamfanoni daban-daban da al'ummomin ƙarƙashin lasisi daban-daban na kyauta (BSD, MIT, Apache 2.0) suna haɓaka bambance-bambancen dozin da yawa na cores microprocessor, SoCs kuma an riga an samar da kwakwalwan kwamfuta. Tsarukan aiki tare da tallafi mai inganci don RISC-V sun haɗa da GNU/Linux (yanzu tun fitowar Glibc 2.27, binutils 2.30, gcc 7 da Linux kernel 4.15) da FreeBSD.
source: budenet.ru