Hōʻike kēia wikiō: kahi papa Raspberry Pi3, pili iā ia ma o ka mea hoʻohui GPIO he papa FPGA Mars Rover2rpi (Cyclone IV), kahi i hoʻopili ʻia kahi monitor HDMI. Hoʻopili ʻia ka lua o ka monitor ma o ka mea hoʻohui HDMI maʻamau o ka Raspberry Pi3. Hana like nā mea a pau e like me kahi ʻōnaehana nānā ʻelua.
A laila e haʻi wau iā ʻoe pehea e hoʻokō ʻia ai kēia.
Loaʻa i ka papa Raspberry Pi3 kaulana kahi mea hoʻohui GPIO kahi e hiki ai iā ʻoe ke hoʻohui i nā kāleka hoʻonui like ʻole: nā sensor, nā LED, nā mea hoʻokele kaʻa stepper a me nā mea hou aku. ʻO ka hana pololei o kēlā me kēia pine ma kahi mea hoʻohui e pili ana i ka hoʻonohonoho awa. ʻO ka hoʻonohonoho GPIO ALT2 hiki iā ʻoe ke hoʻololi i ka mea hoʻohui i ka mode interface DPI, Display Parallel Interface. Aia nā kāleka hoʻonui no ka hoʻopili ʻana i nā monitor VGA ma o DPI. Eia nō naʻe, ʻo ka mea mua, ʻaʻole like ka maʻamau o nā monitor VGA e like me HDMI, a ʻo ka lua, ʻoi aku ka maikaʻi o ke kikowaena kikohoʻe ma mua o ka analogue. Eia kekahi, hana pinepine ʻia ka DAC ma ia mau papa hoʻonui VGA ma ke ʻano o nā kaulahao R-2-R a ʻaʻole pinepine ʻoi aku ma mua o 6 mau bits no kēlā me kēia kala.
Ma ke ʻano ALT2, ʻo nā pine hoʻohui GPIO ka manaʻo penei:
Eia wau i kala i nā pine RGB o ka mea hoʻohui i ʻulaʻula, ʻōmaʻomaʻo a me ka uliuli. ʻO nā hōʻailona koʻikoʻi ʻē aʻe nā hōʻailona V-SYNC a me H-SYNC, a me CLK. ʻO ke alapine o ka uaki CLK ke alapine e hoʻopuka ʻia ai nā waiwai pixel i ka mea hoʻohui; pili ia i ke ʻano wikiō i koho ʻia.
No ka hoʻopili ʻana i kahi monitor HDMI digital, pono ʻoe e hopu i nā hōʻailona DPI o ka interface a hoʻololi iā lākou i nā hōʻailona HDMI. Hiki ke hana i kēia, no ka laʻana, me ka hoʻohana ʻana i kekahi ʻano papa FPGA. E like me ka mea i ʻike ʻia, kūpono ka papa Mars Rover2rpi no kēia mau kumu. ʻO ka ʻoiaʻiʻo, ʻo ke koho nui no ka hoʻopili ʻana i kēia papa ma o kahi adapter kūikawā e like me kēia:
Hoʻohana ʻia kēia papa no ka hoʻonui ʻana i ka nui o nā awa GPIO a no ka hoʻopili ʻana i nā polokalamu peripheral hou aku i ka raspberry. Ma ka manawa like, hoʻohana ʻia nā hōʻailona 4 GPIO me kēia pili no nā hōʻailona JTAG, i hiki i ka papahana mai Raspberry ke hoʻouka i ka firmware FPGA i ka FPGA. Ma muli o kēia, ʻaʻole kūpono kēia pilina maʻamau iaʻu; 4 mau hōʻailona DPI e hāʻule. ʻO ka mea pōmaikaʻi, loaʻa i nā huila ʻē aʻe ma ka papa kahi pinout kūpono Raspberry. No laila hiki iaʻu ke hoʻololi i ka papa 90 degere a hoʻohui mau ia i kaʻu raspberry:
ʻOiaʻiʻo, pono ʻoe e hoʻohana i kahi polokalamu JTAG waho, akā ʻaʻole pilikia kēia.
Aia kekahi pilikia liʻiliʻi. ʻAʻole hiki ke hoʻohana ʻia kēlā me kēia pine FPGA ma ke ʻano he hoʻokomo uaki. He liʻiliʻi wale nā pine i hoʻolaʻa ʻia e hiki ke hoʻohana ʻia no kēia mau hana. No laila ua ʻike ʻia ma aneʻi ʻaʻole hiki i ka hōʻailona GPIO_0 CLK i ka hoʻokomo FPGA, hiki ke hoʻohana ʻia ma ke ʻano he hoʻokomo uaki FPGA. No laila, pono wau e kau i hoʻokahi uea ma ka scarf. Hoʻohui au iā GPIO_0 a me ka hōʻailona KEY[1] o ka papa:
I kēia manawa e haʻi iki wau iā ʻoe e pili ana i ka papahana FPGA. ʻO ka pilikia nui i ka hana ʻana i nā hōʻailona HDMI he mau alapine kiʻekiʻe loa. Inā ʻoe e nānā i ka pinout hoʻohui HDMI, hiki iā ʻoe ke ʻike i nā hōʻailona RGB he mau hōʻailona ʻokoʻa serial.
ʻO ka hoʻohana ʻana i kahi hōʻailona ʻokoʻa e hiki ai iā ʻoe ke hakakā i ke ʻano maʻamau maʻamau ma ka laina hoʻouna. I kēia hihia, ua hoʻololi ʻia ke code ʻewalu-bit kumu o kēlā me kēia hōʻailona kala i kahi TMDS 10-bit (Transition-minimized differential signaling). He ala coding kūikawā kēia e wehe ai i ka mea DC mai ka hōʻailona a hōʻemi i ka hoʻololi ʻana i ka hōʻailona ma kahi laina ʻokoʻa. No ka mea he 10 mau bits i kēia manawa pono e hoʻouna ʻia ma luna o ka laina serial no hoʻokahi byte o ka waihoʻoluʻu, ʻike ʻia ka wikiwiki o ka uaki serializer he 10 mau manawa kiʻekiʻe ma mua o ka wikiwiki o ka uaki pixel. Inā mākou e lawe no ka laʻana i ke ʻano wikiō 1280x720 60Hz, a laila ʻo ke alapine pixel o kēia ʻano he 74,25 MHz. Pono ka serializer 742,5 MHz.
ʻO nā FPGA maʻamau, akā, ʻaʻole hiki ke hana i kēia. Eia naʻe, pōmaikaʻi no mākou, ua kūkulu ʻia ka FPGA i nā pine DDIO. ʻO kēia nā hopena i hala, e like me ia, 2-a-1 serializers. ʻO ia hoʻi, hiki iā lākou ke hoʻopuka i ʻelua mau ʻāpana ma ka piʻi a me ka hāʻule ʻana o nā kihi o ke alapine o ka uaki. 'O ia ho'i, ma kahi papahana FPGA hiki iā'oe ke ho'ohana 'a'ole 740 MHz, akā 370 MHz, akā pono 'oe e ho'ohana i nā mea ho'opuka DDIO i ka FPGA. I kēia manawa ʻo 370 MHz kahi alapine hiki ke loaʻa. ʻO ka mea pōʻino, ʻo 1280x720 mode ka palena. ʻAʻole hiki ke loaʻa kahi hoʻonā kiʻekiʻe ma kā mākou Cyclone IV FPGA i kau ʻia ma ka papa Mars Rover2rpi.
No laila, i ka hoʻolālā ʻana, hele ka frequency pixel input CLK i ka PLL, kahi i hoʻonui ʻia e 5. Ma kēia alapine, ua hoʻololi ʻia nā R, G, B bytes i mau pālua. ʻO kēia ka hana a ka TMDS encoder. ʻO ke kumu kumu ma Verilog HDL e like me kēia:
module hdmi(
input wire pixclk, // 74MHz
input wire clk_TMDS2, // 370MHz
input wire hsync,
input wire vsync,
input wire active,
input wire [7:0]red,
input wire [7:0]green,
input wire [7:0]blue,
output wire TMDS_bh,
output wire TMDS_bl,
output wire TMDS_gh,
output wire TMDS_gl,
output wire TMDS_rh,
output wire TMDS_rl
);
wire [9:0] TMDS_red, TMDS_green, TMDS_blue;
TMDS_encoder encode_R(.clk(pixclk), .VD(red ), .CD({vsync,hsync}), .VDE(active), .TMDS(TMDS_red));
TMDS_encoder encode_G(.clk(pixclk), .VD(green), .CD({vsync,hsync}), .VDE(active), .TMDS(TMDS_green));
TMDS_encoder encode_B(.clk(pixclk), .VD(blue ), .CD({vsync,hsync}), .VDE(active), .TMDS(TMDS_blue));
reg [2:0] TMDS_mod5=0; // modulus 5 counter
reg [4:0] TMDS_shift_bh=0, TMDS_shift_bl=0;
reg [4:0] TMDS_shift_gh=0, TMDS_shift_gl=0;
reg [4:0] TMDS_shift_rh=0, TMDS_shift_rl=0;
wire [4:0] TMDS_blue_l = {TMDS_blue[9],TMDS_blue[7],TMDS_blue[5],TMDS_blue[3],TMDS_blue[1]};
wire [4:0] TMDS_blue_h = {TMDS_blue[8],TMDS_blue[6],TMDS_blue[4],TMDS_blue[2],TMDS_blue[0]};
wire [4:0] TMDS_green_l = {TMDS_green[9],TMDS_green[7],TMDS_green[5],TMDS_green[3],TMDS_green[1]};
wire [4:0] TMDS_green_h = {TMDS_green[8],TMDS_green[6],TMDS_green[4],TMDS_green[2],TMDS_green[0]};
wire [4:0] TMDS_red_l = {TMDS_red[9],TMDS_red[7],TMDS_red[5],TMDS_red[3],TMDS_red[1]};
wire [4:0] TMDS_red_h = {TMDS_red[8],TMDS_red[6],TMDS_red[4],TMDS_red[2],TMDS_red[0]};
always @(posedge clk_TMDS2)
begin
TMDS_shift_bh <= TMDS_mod5[2] ? TMDS_blue_h : TMDS_shift_bh [4:1];
TMDS_shift_bl <= TMDS_mod5[2] ? TMDS_blue_l : TMDS_shift_bl [4:1];
TMDS_shift_gh <= TMDS_mod5[2] ? TMDS_green_h : TMDS_shift_gh [4:1];
TMDS_shift_gl <= TMDS_mod5[2] ? TMDS_green_l : TMDS_shift_gl [4:1];
TMDS_shift_rh <= TMDS_mod5[2] ? TMDS_red_h : TMDS_shift_rh [4:1];
TMDS_shift_rl <= TMDS_mod5[2] ? TMDS_red_l : TMDS_shift_rl [4:1];
TMDS_mod5 <= (TMDS_mod5[2]) ? 3'd0 : TMDS_mod5+3'd1;
end
assign TMDS_bh = TMDS_shift_bh[0];
assign TMDS_bl = TMDS_shift_bl[0];
assign TMDS_gh = TMDS_shift_gh[0];
assign TMDS_gl = TMDS_shift_gl[0];
assign TMDS_rh = TMDS_shift_rh[0];
assign TMDS_rl = TMDS_shift_rl[0];
endmodule
module TMDS_encoder(
input clk,
input [7:0] VD, // video data (red, green or blue)
input [1:0] CD, // control data
input VDE, // video data enable, to choose between CD (when VDE=0) and VD (when VDE=1)
output reg [9:0] TMDS = 0
);
wire [3:0] Nb1s = VD[0] + VD[1] + VD[2] + VD[3] + VD[4] + VD[5] + VD[6] + VD[7];
wire XNOR = (Nb1s>4'd4) || (Nb1s==4'd4 && VD[0]==1'b0);
wire [8:0] q_m = {~XNOR, q_m[6:0] ^ VD[7:1] ^ {7{XNOR}}, VD[0]};
reg [3:0] balance_acc = 0;
wire [3:0] balance = q_m[0] + q_m[1] + q_m[2] + q_m[3] + q_m[4] + q_m[5] + q_m[6] + q_m[7] - 4'd4;
wire balance_sign_eq = (balance[3] == balance_acc[3]);
wire invert_q_m = (balance==0 || balance_acc==0) ? ~q_m[8] : balance_sign_eq;
wire [3:0] balance_acc_inc = balance - ({q_m[8] ^ ~balance_sign_eq} & ~(balance==0 || balance_acc==0));
wire [3:0] balance_acc_new = invert_q_m ? balance_acc-balance_acc_inc : balance_acc+balance_acc_inc;
wire [9:0] TMDS_data = {invert_q_m, q_m[8], q_m[7:0] ^ {8{invert_q_m}}};
wire [9:0] TMDS_code = CD[1] ? (CD[0] ? 10'b1010101011 : 10'b0101010100) : (CD[0] ? 10'b0010101011 : 10'b1101010100);
always @(posedge clk) TMDS <= VDE ? TMDS_data : TMDS_code;
always @(posedge clk) balance_acc <= VDE ? balance_acc_new : 4'h0;
endmodule
A laila, hāʻawi ʻia nā hui hoʻopuka i ka DDIO output, kahi e hoʻopuka ai i kahi hōʻailona hoʻokahi-bit ma nā ʻaoʻao piʻi a hāʻule.
Hiki ke wehewehe ʻia ʻo DDIO ponoʻī me kēia code Verilog:
module ddio(
input wire d0,
input wire d1,
input wire clk,
output wire out
);
reg r_d0;
reg r_d1;
always @(posedge clk)
begin
r_d0 <= d0;
r_d1 <= d1;
end
assign out = clk ? r_d0 : r_d1;
endmoduleAkā ʻaʻole paha e hana pēlā. Pono ʻoe e hoʻohana i kā Alter megafunction ALTDDIO_OUT e hiki ai i nā mea hoʻopuka DDIO. Hoʻohana kaʻu papahana i ka mea waihona waihona ALTDDIO_OUT.
He mea paʻakikī paha kēia a pau, akā hana.
Hiki iā ʻoe ke nānā i nā kumu kumu a pau i kākau ʻia ma Verilog HDL .
Hoʻopili ʻia ka firmware i hui ʻia no ka FPGA i loko o ka chip EPCS i hoʻokomo ʻia ma ka papa Mars Rover2rpi. No laila, ke hoʻohana ʻia ka mana i ka papa FPGA, e hoʻomaka ka FPGA mai ka hoʻomanaʻo uila a hoʻomaka.
I kēia manawa pono mākou e kamaʻilio iki e pili ana i ka hoʻonohonoho ʻana o ka Raspberry ponoʻī.
Ke hana nei au i nā hoʻokolohua ma Raspberry PI OS (32 bit) e pili ana iā Debian Buster, Version: ʻAukake 2020,
Ka lā hoʻokuʻu: 2020-08-20, Kernel version:5.4.
Pono ʻoe e hana i ʻelua mau mea:
- hoʻoponopono i ka faila config.txt;
- hana i kahi hoʻonohonoho kikowaena X e hana me ʻelua mau mea nānā.
I ka hoʻoponopono ʻana i ka faila /boot/config.txt pono ʻoe:
- hoʻopau i ka hoʻohana ʻana o i2c, i2s, spi;
- hoʻohana i ke ʻano DPI me ka hoʻohana ʻana i ka overlay dtoverlay=dpi24;
- hoʻonohonoho i ke ʻano wikiō 1280 × 720 60Hz, 24 bits no ka pixel ma DPI;
- E kuhikuhi i ka helu i makemake ʻia o nā framebuffers 2 (max_framebuffers=2, a laila e ʻike ʻia ka lua o ka mea / dev / fb1)
Penei ka kikokikona piha o ka faila config.txt.
# For more options and information see
# http://rpf.io/configtxt
# Some settings may impact device functionality. See link above for details
# uncomment if you get no picture on HDMI for a default "safe" mode
#hdmi_safe=1
# uncomment this if your display has a black border of unused pixels visible
# and your display can output without overscan
disable_overscan=1
# uncomment the following to adjust overscan. Use positive numbers if console
# goes off screen, and negative if there is too much border
#overscan_left=16
#overscan_right=16
#overscan_top=16
#overscan_bottom=16
# uncomment to force a console size. By default it will be display's size minus
# overscan.
#framebuffer_width=1280
#framebuffer_height=720
# uncomment if hdmi display is not detected and composite is being output
hdmi_force_hotplug=1
# uncomment to force a specific HDMI mode (this will force VGA)
#hdmi_group=1
#hdmi_mode=1
# uncomment to force a HDMI mode rather than DVI. This can make audio work in
# DMT (computer monitor) modes
#hdmi_drive=2
# uncomment to increase signal to HDMI, if you have interference, blanking, or
# no display
#config_hdmi_boost=4
# uncomment for composite PAL
#sdtv_mode=2
#uncomment to overclock the arm. 700 MHz is the default.
#arm_freq=800
# Uncomment some or all of these to enable the optional hardware interfaces
#dtparam=i2c_arm=on
#dtparam=i2s=on
#dtparam=spi=on
dtparam=i2c_arm=off
dtparam=spi=off
dtparam=i2s=off
dtoverlay=dpi24
overscan_left=0
overscan_right=0
overscan_top=0
overscan_bottom=0
framebuffer_width=1280
framebuffer_height=720
display_default_lcd=0
enable_dpi_lcd=1
dpi_group=2
dpi_mode=87
#dpi_group=1
#dpi_mode=4
dpi_output_format=0x6f027
dpi_timings=1280 1 110 40 220 720 1 5 5 20 0 0 0 60 0 74000000 3
# Uncomment this to enable infrared communication.
#dtoverlay=gpio-ir,gpio_pin=17
#dtoverlay=gpio-ir-tx,gpio_pin=18
# Additional overlays and parameters are documented /boot/overlays/README
# Enable audio (loads snd_bcm2835)
dtparam=audio=on
[pi4]
# Enable DRM VC4 V3D driver on top of the dispmanx display stack
#dtoverlay=vc4-fkms-v3d
max_framebuffers=2
[all]
#dtoverlay=vc4-fkms-v3d
max_framebuffers=2
Ma hope o kēia, pono ʻoe e hana i kahi faila hoʻonohonoho no ka server X e hoʻohana i ʻelua mau mākaʻikaʻi ma ʻelua framebuffers /dev/fb0 a me /dev/fb1:
ʻO kaʻu faila hoʻonohonoho /usr/share/x11/xorg.conf.d/60-dualscreen.conf e like me kēia
Section "Device"
Identifier "LCD"
Driver "fbturbo"
Option "fbdev" "/dev/fb0"
Option "ShadowFB" "off"
Option "SwapbuffersWait" "true"
EndSection
Section "Device"
Identifier "HDMI"
Driver "fbturbo"
Option "fbdev" "/dev/fb1"
Option "ShadowFB" "off"
Option "SwapbuffersWait" "true"
EndSection
Section "Monitor"
Identifier "LCD-monitor"
Option "Primary" "true"
EndSection
Section "Monitor"
Identifier "HDMI-monitor"
Option "RightOf" "LCD-monitor"
EndSection
Section "Screen"
Identifier "screen0"
Device "LCD"
Monitor "LCD-monitor"
EndSection
Section "Screen"
Identifier "screen1"
Device "HDMI"
Monitor "HDMI-monitor"
EndSection
Section "ServerLayout"
Identifier "default"
Option "Xinerama" "on"
Option "Clone" "off"
Screen 0 "screen0"
Screen 1 "screen1" RightOf "screen0"
EndSection
ʻAe, inā ʻaʻole i hoʻokomo ʻia, a laila pono ʻoe e hoʻokomo iā Xinerama. A laila e hoʻonui piha ʻia ka lumi papapihi i ʻelua monitor, e like me ka hōʻike ʻana i ka wikiō demo ma luna.
ʻO ia wale nō paha. I kēia manawa, hiki i nā mea nona Raspberry Pi3 ke hoʻohana i ʻelua mau mākaʻikaʻi.
Hiki ke loaʻa ka wehewehe a me ke kiʻi kaapuni o ka papa Mars Rover2rpi .
Source: www.habr.com