Ua mākaukau ka prototype mua o ka open source Libre-SOC chip no ka hana ʻana

ʻO ka papahana Libre-SOC, e hoʻomohala ana i kahi puʻupuʻu hāmama me kahi hoʻolālā hybrid i ke ʻano CDC 6600, kahi e hōʻemi ai i ka nui a me ka paʻakikī o ka chip, ʻaʻole i hoʻokaʻawale ʻia nā ʻōlelo aʻoaʻo CPU, VPU a me GPU i hoʻokahi ISA. , ua hōʻea i ka pae o ka hoʻoili ʻana i ka hāpana hoʻāʻo mua i ka hana. Ua hoʻokumu mua ʻia ka papahana ma lalo o ka inoa ʻo Libre RISC-V, akā ua kapa ʻia ʻo Libre-SOC ma hope o ka hoʻoholo ʻana e pani i ka RISC-V me ka OpenPOWER 3.0 instruction set architecture (ISA).

ʻO ka manaʻo o ka papahana e hana i kahi ʻōnaehana piha, hāmama loa a me nā aliʻi ʻole ma kahi chip (SoC) hiki ke hoʻohana ʻia i nā kamepiula papa hoʻokahi, nā netbook a me nā mea lawe lima like ʻole. Ma waho aʻe o nā ʻōlelo aʻoaʻo kikoʻī CPU a me nā papa inoa kumu nui, hāʻawi ʻo Libre-SOC i nā hiki ke hana i nā hana vector a me nā helu helu kūikawā maʻamau o nā VPU a me nā GPU i loko o kahi poloka hana hoʻokahi. Hoʻohana ka chip i ka OpenPOWER instruction set architecture, ka Simple-V extension me nā kuhikuhi no ka vectorization a me ka hoʻoili like ʻana o ka ʻikepili, a me nā ʻōlelo aʻoaʻo kūikawā no ka hoʻololi ARGB a me nā hana 3D maʻamau.

Kuhi ʻia nā ʻōlelo aʻo GPU i ka hoʻohana ʻana me ka Vulkan graphics API, a me ka VPU i ka hoʻololi ʻana a me ka hoʻololi ʻana o YUV-RGB o MPEG1/2, MPEG4 ASP (xvid), H.264, H.265, VP8, VP9, ​​​​AV1, MP3 , AC3, nā kūmole Vorbis a me ka Opus. Ke kūkulu ʻia nei kahi kaʻa kaʻa manuahi no Mesa e hoʻohana ana i nā mana o Libre-SOC e hoʻolako i kahi lako polokalamu hoʻokō wikiwiki ʻia o ka Vulkan graphics API. No ka laʻana, hiki ke unuhi ʻia nā shaders Vulkan me ka mīkini JIT e hoʻokō me ka hoʻohana ʻana i nā kuhikuhi kūikawā i loaʻa ma Libre-SOC.

I ka prototype ho'āʻo aʻe, hoʻolālā lākou e hoʻokō i ka hoʻonui SVP64 (Variable-length Vectorization), e ʻae ana i ka Libre-SOC e hoʻohana ʻia ma ke ʻano he vector processor (ma kahi o 32 64-bit general-purpose registers, 128 registers e hāʻawi ʻia. no ka helu vector). ʻO ka prototype mua he hoʻokahi wale nō kumu e holo ana ma 300 MHz, akā i loko o ʻelua mau makahiki ua hoʻolālā ʻia e hoʻokuʻu i kahi mana 4-core, a laila kahi mana 8-core, a i ka wā lōʻihi he mana 64-core.

E hana ʻia ka pahu mua o ka chip e TSMC me ka hoʻohana ʻana i ka ʻenehana hana 180nm. Hoʻokaʻawale ʻia nā hoʻomohala āpau o ka papahana ma lalo o nā laikini manuahi, me nā faila ma ke ʻano GDS-II me ka wehewehe ʻana i ka topology piha o ka chip, lawa e hoʻomaka i kāu hana ponoʻī. ʻO Libre-SOC ka pahu kūʻokoʻa kūʻokoʻa mua loa e pili ana i ka hoʻolālā Power ʻaʻole i hana ʻia e IBM. Ua hoʻohana ka hoʻomohala ʻana i ka ʻōlelo wehewehe hardware nMigen (HDL e pili ana i ka Python, me ka hoʻohana ʻole ʻana iā VHDL a me Verilog), nā hale waihona puke maʻamau FlexLib mai ka papahana Chips4Makers, a me ka pahu hana Coriolis2 VLSI manuahi no ka hoʻololi ʻana mai HDL a i GDS-II.

ʻO ka hoʻomohala ʻana o Libre-SOC i kākoʻo kālā ʻia e ka NLnet Foundation, nāna i hoʻokaʻawale i 400 tausani euros no ka hana ʻana i kahi puʻupuʻu hāmama loa ma ke ʻano he papahana e hana i nā hoʻonā ʻenehana kumu i hōʻoia ʻia a hilinaʻi. He 5.5x5.9 mm ka nui o ka chip a he 130 tausani mau puka logic. Loaʻa iā ia he ʻehā 4KB SRAM modules a me kahi 300 MHz phase-locked loop (PLL).

Ua mākaukau ka prototype mua o ka open source Libre-SOC chip no ka hana ʻana


Source: opennet.ru

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