Linux Foundation yuav qhib cov chips

Linux Foundation tau tshaj tawm cov kev taw qhia tshiab - CHIPS Alliance. Raws li ib feem ntawm txoj haujlwm no, lub koom haum yuav tsim cov kev qhia pub dawb RISC-V thiab cov thev naus laus zis los tsim cov txheej txheem raws li nws. Cia peb qhia koj paub ntau ntxiv txog dab tsi tshwm sim hauv cheeb tsam no.

Linux Foundation yuav qhib cov chips
/ duab Gareth Halfacree CC BY-SA

Vim li cas CHIPS Alliance tshwm sim?

Patches tiv thaiv Meltdown thiab Spectre, qee zaum txo cov khoom tsim tau servers los ntawm 50%. Nyob rau tib lub sijhawm, kev hloov pauv tshiab ntawm qhov tsis zoo cuam tshuam nrog kev xav txog kev ua tiav cov lus tseem tab tom tshwm sim. Hais txog ib tug ntawm lawv tau paub thaum ntxov lub Peb Hlis - Cov kws paub txog kev ruaj ntseg cov ntaub ntawv dubbed nws Spoiler. Qhov xwm txheej no cuam tshuam kev sib sab laj qhov yuav tsum tau tshuaj xyuas cov kev daws teeb meem uas twb muaj lawm thiab cov txheej txheem rau lawv txoj kev loj hlob. Hauv particular, Intel twb npaj lawm ib tug tshiab architecture rau nws processors, tsis raug rau Meltdown thiab Spectre.

Lub Linux Foundation tsis tau sawv ib sab. Lub koom haum tau pib nws txoj kev pib, CHIPS Alliance, uas cov tswv cuab yuav tsim RISC-V-based processors.

Cov phiaj xwm dab tsi twb tau tsim

CHIPS Alliance cov tswv cuab suav nrog Google, Western Digital (WD) thiab SiFive. Txhua tus ntawm lawv tau nthuav tawm lawv tus kheej txoj kev txhim kho. Wb tham txog ib co ntawm lawv.

RISCV-DV

IT tshawb nrhiav loj tau tshaj tawm lub platform rau kev sim RISC-V-based processors los qhib qhov chaw. Kev daws teeb meem tsim tawm pawg ntawd tso cai tshawb xyuas cov kev ua haujlwm ntawm lub cuab yeej: kuaj cov txheej txheem hloov pauv, hu rau pawg, CSR- sau npe, thiab lwm yam.

Piv txwv li, qhov no yog qhov zoo li chav kawmLub luag haujlwm rau kev ua qhov kev sim yooj yim ntawm cov lus qhia lej lej:

class riscv_arithmetic_basic_test extends riscv_instr_base_test;

  `uvm_component_utils(riscv_arithmetic_basic_test)
  `uvm_component_new

  virtual function void randomize_cfg();
    cfg.instr_cnt = 10000;
    cfg.num_of_sub_program = 0;
    cfg.no_fence = 1;
    cfg.no_data_page = 1'b1;
    cfg.no_branch_jump = 1'b1;
    `DV_CHECK_RANDOMIZE_WITH_FATAL(cfg,
                                   init_privileged_mode == MACHINE_MODE;
                                   max_nested_loop == 0;)
    `uvm_info(`gfn, $sformatf("riscv_instr_gen_config is randomized:n%0s",
                    cfg.sprint()), UVM_LOW)
  endfunction

endclass

Los ntawm raws li developers, lub platform txawv los ntawm nws cov analogues nyob rau hauv uas nws tso cai rau ua raws li cov kev ntsuam xyuas ntawm tag nrho cov nti Cheebtsam, nrog rau lub cim xeeb thaiv.

OmniXtend raws tu qauv

Qhov no yog cov txheej txheem network los ntawm WD uas muab cache coherence hla Ethernet. OmniXtend tso cai rau koj los pauv cov lus ncaj qha nrog lub processor cache thiab siv los txuas ntau hom accelerators: GPU lossis FPGA. Nws kuj tseem tsim nyog rau kev tsim cov tshuab raws li ntau yam RISC-V chips.

Cov txheej txheem twb tau txais kev txhawb nqa SweRV chipstaw qhia rau kev ua cov ntaub ntawv hauv cov chaw khaws ntaub ntawv. SweRV yog 32-ntsis, dual-pipeline superscalar processor tsim los ntawm 28nm txheej txheem thev naus laus zis. Txhua lub raj xa dej muaj cuaj theem, uas ua rau nws tuaj yeem thauj khoom thiab ua tiav ntau cov lus txib ib txhij. Cov cuab yeej ua haujlwm ntawm qhov zaus ntawm 1,8 GHz.

Generator Rocket Chip

Cov tshuaj yog los ntawm SiFive, uas tau tsim los ntawm cov neeg tsim khoom ntawm RISC-V thev naus laus zis. Rocket Chip yog RISC-V processor core generator hauv Chisel lus. Nws yog ib tug ib txheej ntawm cov tsev qiv ntawv parameterized uas siv los tsim SoC.

Nrog rau Txaug, ces nws yog cov lus piav qhia kho vajtse raws li Scala. Nws generates low-level Verilog code uas sib tham rau kev ua haujlwm ntawm ASIC thiab FPGA. Yog li, nws tso cai rau koj siv OOP cov cai thaum tsim RTL.

Alliance kev cia siab

Cov kws tshaj lij hais tias Linux Foundation qhov kev pib yuav ua rau lub lag luam processor muaj kev ywj pheej thiab qhib rau cov neeg tshiab. Hauv IDC noj peb caugtias kev loj hlob ntawm cov haujlwm zoo li no yuav muaj txiaj ntsig zoo rau kev txhim kho cov tshuab kev kawm thiab AI systems feem ntau.

Linux Foundation yuav qhib cov chips
/ duab Fritzchens Fritz PD

Kev txhim kho ntawm cov txheej txheem qhib yuav kuj txo tus nqi ntawm kev tsim cov chips kev cai. Txawm li cas los xij, qhov no tsuas yog tshwm sim yog tias lub zej zog Linux Foundation tswj kom nyiam cov neeg tsim khoom txaus.

Tej yaam num zoo sib xws

Lwm lub koom haum koom nrog hauv kev tsim cov haujlwm ntsig txog kev qhib kho vajtse. Ib qho piv txwv yog lub koom haum CXL, uas tau qhia txog Compute Express Link tus qauv nyob rau nruab nrab Lub Peb Hlis. Lub tshuab zoo ib yam li OmniXtend thiab tseem txuas CPU, GPU, FPGA. Rau kev sib pauv ntaub ntawv, tus qauv siv lub npav PCIe 5.0.

Lwm qhov haujlwm tshwj xeeb rau kev txhim kho cov thev naus laus zis yog MIPS Qhib, uas tau tshwm sim thaum Lub Kaum Ob Hlis 2018. Qhov pib tau tsim los ntawm kev pib Wave Computing. Cov neeg tsim khoom tab tom npaj qhib Nkag mus rau qhov tseeb 32- thiab 64-ntsis MIPS cov lus txib teem rau IT zej zog. Pib ntawm qhov project cia siab tias yuav nyob rau lub hlis tom ntej.

Feem ntau, qhov qhib qhov kev mus kom ze tau dhau los lees paub tsis yog rau software nkaus xwb, tab sis kuj rau kho vajtse. Cov haujlwm zoo li no tau txais kev txhawb nqa los ntawm cov tuam txhab loj. Yog li ntawd, peb tuaj yeem cia siab tias yav tom ntej no ntau cov khoom siv raws li cov qauv qhib kho vajtse yuav tshwm sim hauv khw.

Cov ntawv tshaj tawm tshiab los ntawm peb cov tuam txhab blog:

Cov ntsiab lus los ntawm peb Telegram channel:

Tau qhov twg los: www.hab.com

Ntxiv ib saib