RISC-V Foundation hais txog kev txheeb xyuas cov haujlwm ntawm microkernel ntawm cov kab ke nrog RISC-V kev qhia teeb tsa architecture. Kev pov thawj los mus rau kev ntseeg tau ntawm kev ua haujlwm seL4, uas qhia txog kev ua raws li cov lus qhia tshwj xeeb uas tau teev tseg hauv cov lus raug. Pov thawj ntawm kev ntseeg tau seL4 nyob rau hauv lub hom phiaj tseem ceeb systems raws li RISC-V RV64 processors uas yuav tsum tau nce qib ntawm kev ntseeg tau thiab lav qhov tsis muaj kev ua tsis tiav. Cov neeg tsim tawm ntawm cov software khiav saum toj kawg nkaus ntawm seL4 ntsiav tuaj yeem ntseeg siab tias yog tias muaj qhov tsis ua haujlwm hauv ib feem ntawm lub kaw lus, qhov tsis ua haujlwm no yuav tsis kis mus rau lwm qhov system thiab, tshwj xeeb, nws qhov tseem ceeb.
Lub seL4 microkernel tau pib tshawb xyuas rau 32-ntsis ARM processors, thiab tom qab ntawd rau 64-ntsis x86 processors. Nws tau raug sau tseg tias kev sib xyaw ua ke ntawm qhib RISC-V kho vajtse architecture nrog qhib seL4 microkernel yuav ua tiav qib tshiab ntawm kev ruaj ntseg, txij li cov khoom siv kho vajtse kuj tuaj yeem tshawb xyuas tag nrho yav tom ntej, uas yog tsis yooj yim sua kom ua tiav rau cov tswv cuab kho vajtse.
Thaum kuaj xyuas seL4, nws xav tias cov cuab yeej ua haujlwm raws li tau teev tseg thiab cov lus qhia tshwj xeeb piav qhia txog tus cwj pwm ntawm lub kaw lus, tab sis qhov tseeb, cov cuab yeej tsis pub dawb los ntawm qhov yuam kev, uas tau pom meej meej los ntawm cov teeb meem tshwm sim tsis tu ncua nyob rau hauv cov txheej txheem ntawm kev txiav txim siab ntawm cov lus qhia. Qhib cov cuab yeej kho vajtse ua kom yooj yim rau kev sib koom ua ke ntawm kev hloov pauv kev nyab xeeb - piv txwv li, txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau txhawm rau tshem tawm nws yog qhov ua tau kom tshem tawm qhov teeb meem hauv cov khoom siv kho vajtse.
Nco qab tias seL4 architecture txav qhov chaw rau kev tswj cov khoom siv kernel rau hauv cov neeg siv qhov chaw thiab siv tib qho kev tswj xyuas kev nkag mus rau cov peev txheej xws li cov neeg siv khoom. Lub microkernel tsis muab cov txheej txheem ua tiav qib siab rau kev tswj hwm cov ntaub ntawv, txheej txheem, kev sib txuas hauv network, thiab lwm yam; hloov, nws tsuas yog muab cov txheej txheem me me rau kev tswj kev nkag mus rau qhov chaw nyob hauv lub cev, cuam tshuam, thiab cov khoom siv processor. High-theem abstractions thiab tsav tsheb rau kev cuam tshuam nrog kho vajtse yog siv cais nyob rau sab saum toj ntawm microkernel nyob rau hauv daim ntawv ntawm cov neeg siv-theem cov hauj lwm. Kev nkag mus rau cov haujlwm zoo li no rau cov peev txheej uas muaj rau microkernel tau teeb tsa los ntawm kev txhais cov cai.
RISC-V muab cov kev qhia qhib thiab hloov tau lub tshuab uas tso cai rau cov microprocessors tsim rau cov ntawv thov tsis tas yuav tsum tau muaj nuj nqis lossis cov hlua txuas rau kev siv. RISC-V tso cai rau koj los tsim qhib SoCs thiab cov txheej txheem. Tam sim no raws li RISC-V specification los ntawm cov tuam txhab sib txawv thiab cov zej zog raws li ntau daim ntawv tso cai pub dawb (BSD, MIT, Apache 2.0) ob peb lub kaum os variants ntawm microprocessor cores, SoCs thiab twb tau tsim chips. RISC-V kev txhawb nqa tau tshwm sim txij li thaum tso tawm ntawm Glibc 2.27, binutils 2.30, gcc 7, thiab Linux ntsiav 4.15.
Tau qhov twg los: opennet.ru