Tso tawm ntawm LLVM 12.0 compiler suite

Tom qab rau lub hlis ntawm txoj kev loj hlob, qhov kev tso tawm ntawm LLVM 12.0 qhov project tau nthuav tawm - GCC-tshaj cov cuab yeej (compilers, optimizers thiab code generators) uas muab cov kev pab cuam rau hauv nruab nrab bitcode ntawm RISC-zoo li cov lus qhia virtual (qib qis-theem virtual tshuab nrog a multi-level optimization system). Lub generated pseudocode tuaj yeem hloov dua siab tshiab siv JIT compiler rau hauv cov lus qhia tshuab ncaj qha thaum lub sijhawm ua haujlwm.

Kev txhim kho hauv Clang 12.0:

• Kev them nyiaj yug rau qhov "yuav" thiab "tsis zoo" cov yam ntxwv uas tau npaj tseg hauv C ++ 20 tus qauv tau siv thiab ua haujlwm los ntawm lub neej ntawd, tso cai rau tus kws kho kom zoo kom paub txog qhov tshwm sim ntawm qhov kev tsim kho tau tshwm sim (piv txwv li, "[[xav tau. ]] yog (random> 0) {“).
• Ntxiv kev txhawb nqa rau AMD Zen 3 (-march = znver3), Intel Alder Lake (-march = alderlake) thiab Intel Sapphire Rapids (-march = sapphirerapids) processors.
• Ntxiv kev txhawb nqa rau "-march=x86-64-v[234]" chij xaiv x86-64 qib architecture (v2 - npog SSE4.2, SSSE3, POPCNT thiab CMPXCHG16B txuas ntxiv; v3 - AVX2 thiab MOVBE; v4 - AVX-512 )
• Ntxiv kev txhawb nqa rau Arm Cortex-A78C (cortex-a78c), Arm Cortex-R82 (cortex-r82), Arm Neoverse V1 (neoverse-v1), Arm Neoverse N2 (neoverse-n2) thiab Fujitsu A64FX (a64fx) processors. Piv txwv li, txhawm rau pab kom ua tau zoo rau Neoverse-V1 CPUs, koj tuaj yeem hais qhia "-mcpu = neoverse-v1".
• Rau lub AArch64 architecture, tshiab compiler chij "-moutline-atomics" thiab "-mno-outline-atomics" tau ntxiv los pab los yog lov tes taw kev ua haujlwm atomic pab ua haujlwm, xws li "__aarch64_cas8_relax". Cov haujlwm zoo li no tshawb pom thaum lub sijhawm ua haujlwm seb puas muaj LSE (Large System Extensions) kev txhawb nqa thiab siv cov lus qhia atomic processor lossis poob rov qab siv LL / SC (Load-link / store-conditional) cov lus qhia rau synchronization.
• Ntxiv "-fbinutils-version" kev xaiv los xaiv lub hom phiaj version ntawm binutils suite rau kev sib raug zoo nrog cov laus txuas thiab kev sib dhos tus cwj pwm.
• Rau ELF executable cov ntaub ntawv, thaum tus chij "-gz" yog teev, compression ntawm debugging ntaub ntawv siv lub zlib tsev qiv ntawv yog enabled los ntawm lub neej ntawd (gz = zlib). Txuas cov ntaub ntawv uas tshwm sim yuav tsum tau lld lossis GNU binutils 2.26+. Txhawm rau rov qab sib raug zoo nrog cov laus versions ntawm binutils, koj tuaj yeem qhia "-gz = zlib-gnu".
• Tus taw tes 'qhov no' tam sim no tau ua tiav nrog cov kev kuaj xyuas tsis zoo thiab tsis lees paub (N). Txhawm rau tshem tawm tus cwj pwm tsis zoo thaum koj xav siv NULL qhov tseem ceeb, koj tuaj yeem siv "-fdelete-null-pointer-checks" kev xaiv.
• Ntawm Linux platform, hom "-fasynchronous-unwind-tables" yog qhib rau AArch64 thiab PowerPC architectures los tsim cov rooj hu xov tooj, zoo li hauv GCC.
• Hauv "#pragma clang voj vectorize_width" ntxiv lub peev xwm los qhia qhov "taw" (default) thiab "scalable" xaiv los xaiv txoj kev vectorization. Hom "scalable", ywj siab ntawm vector ntev, yog kev sim thiab tuaj yeem siv rau ntawm cov khoom siv uas txhawb nqa vectorization scalable.
• Txhim kho kev txhawb nqa rau lub Windows platform: Kev sib koom ua ke binary rau Windows ntawm Arm64 systems tau npaj, suav nrog Clang compiler, LLD linker thiab compiler-rt runtime qiv. Thaum lub tsev rau MinGW lub hom phiaj platforms, .exe suffix yog ntxiv, txawm tias thaum hla kev sib sau ua ke.
• Lub peev xwm cuam tshuam nrog kev txhawb nqa rau OpenCL, OpenMP thiab CUDA tau nthuav dav. Ntxiv kev xaiv "-cl-std = CL3.0" thiab "-cl-std = CL1.0" los xaiv macro xaiv rau OpenCL 3.0 thiab OpenCL 1.0. Cov cuab yeej kuaj mob tau nthuav dav.
• Ntxiv kev txhawb nqa rau HRESET, UINTR, thiab AVXVNNI cov lus qhia siv hauv qee qhov x86-based processors.
• Ntawm x86 systems, kev txhawb nqa rau "-mtune=" kev xaiv tau qhib ", uas qhib qhov kev xaiv microarchitectural optimizations, tsis hais tus nqi ntawm "-march = "
• Lub ntsuas hluav taws xob zoo li qub tau txhim kho kev ua haujlwm ntawm qee qhov POSIX kev ua haujlwm thiab txhim kho kev txiav txim siab ntawm qhov tshwm sim ntawm kev ua haujlwm raws li kev cai thaum muaj ntau lub cim tseem ceeb hauv kev sib piv. Cov tshev tshiab tau ntxiv lawm: fuchia.HandleChecker (txhais tes tuav hauv cov qauv), webkit.UncountedLambdaCapturesChecker webkit thiab alpha.webkit.UncountedLocalVarsChecker (coj mus rau hauv tus account lub peculiarities ntawm kev ua hauj lwm nrog pointers nyob rau hauv lub WebKit cav code).
• Hauv cov kab lus siv hauv cov ntsiab lus ntawm qhov tsis tu ncua, kev siv cov haujlwm ua haujlwm __builtin_bitreverse*, __builtin_rotateleft*, __builtin_rotateright*, _mm_popcnt*, _bit_scan_forward, __bsfd, __bsfq, _bs_r, _bs_b, _bs_b, ap, __bswapd, __bswap64, tso cai. __bswapq , _castf*, __rol* and __ror*.
• Ntxiv ib qho kev xaiv BitFieldColonSpacing rau cov cuab yeej siv cuab yeej cuab tam los xaiv qhov sib nrug ntawm cov cim, kab, thiab cov ntsiab lus teb.
• Lub clangd caching neeg rau zaub mov (Clang Server) ntawm Linux platform tau txo qis kev siv lub cim xeeb thaum lub sijhawm ua haujlwm ntev (lub sijhawm hu rau malloc_trim tau muab xa rov qab cov nplooj ntawv nco dawb rau lub operating system).

Kev tsim kho tseem ceeb hauv LLVM 12.0:

• Kev them nyiaj yug rau llvm-tsim tsim cov cuab yeej sau hauv Python tau raug txiav tawm, thiab qhov project tau hloov pauv tag nrho rau kev siv CMake tsim system.
• Nyob rau hauv lub backend rau AArch64 architecture, kev txhawb nqa rau lub Windows platform tau raug txhim kho: tsim nyog ntawm cov khoom tsim tawm rau lub hom phiaj Windows tau ua tiav, tiam ntawm cov ntaub ntawv ntawm kev hu xov tooj tau zoo (qhov loj ntawm cov ntaub ntawv no tau raug txo los ntawm 60. %), lub peev xwm los tsim cov ntaub ntawv unwind siv assembler tau ntxiv cov lus qhia .seh_*.
• Lub backend rau PowerPC architecture nta tshiab optimizations rau loops thiab inline xa mus, nthuav kev txhawb nqa rau Power10 processors, ntxiv kev txhawb nqa rau MMA cov lus qhia rau matrix manipulation, thiab txhim kho kev txhawb nqa rau AIX operating system.
• Lub x86 backend ntxiv kev txhawb nqa rau AMD Zen 3, Intel Alder Lake thiab Intel Sapphire Rapids processors, nrog rau HRESET, UINTR thiab AVXVNNI processor cov lus qhia. Kev them nyiaj yug rau MPX (Kev Tiv Thaiv Kev Tiv Thaiv Txuas Ntxiv) rau kev tshuaj xyuas cov taw qhia kom paub meej tias ciam teb tsis tau txais kev txhawb nqa ntxiv lawm (cov thev naus laus zis no tsis tau nthuav dav thiab twb tau raug tshem tawm ntawm GCC thiab clang). Ntxiv kev txhawb nqa rau lub assembler rau lub {disp32} thiab {disp8} ua ntej thiab .d32 thiab .d8 suffixes los tswj qhov loj ntawm operand offsets thiab jumps. Ntxiv tus cwj pwm tshiab "tune-cpu" los tswj kev suav nrog microarchitectural optimizations.
• Ib hom tshiab "-fsanitize = unsigned-hloov-base" tau muab ntxiv rau qhov ntsuas qhov teeb meem ntawm tus lej (cov tshuaj tua kab mob, "-fsanitize = integer") txhawm rau txheeb xyuas cov overflows ntawm unsigned integers tom qab hloov me ntsis mus rau sab laug.
• Hauv ntau lub tshuab ntes (asan, cfi, lsan, msan, tsan, ubsan sanitizer) kev txhawb nqa rau Linux faib nrog cov tsev qiv ntawv Musl tus qauv tau ntxiv.
• Lub peev xwm ntawm LLD txuas tau nthuav dav. Txhim kho kev txhawb nqa rau ELF hom, suav nrog cov kev xaiv ntxiv "--dependency-file", "-error-handling-script", "-lto-pseudo-probe-for-profiling", "-no-lto-whole-program -visibility "" Txhim kho MinGW kev txhawb nqa. Rau Mach-O hom (macOS), kev txhawb nqa rau arm64, caj npab, thiab i386 architectures, txuas-lub sij hawm optimizations (LTO), thiab pawg unwinding rau qhov tshwj xeeb tuav tau siv.
• Libc ++ siv cov yam ntxwv tshiab ntawm C ++ 20 tus qauv thiab tau pib tsim cov yam ntxwv ntawm C ++ 2b specification. Ntxiv kev txhawb nqa rau lub tsev nrog kev pab cuam hauv zos tsis siv neeg (“-DLIBCXX_ENABLE_LOCALIZATION=OFF”) thiab cov khoom siv los tsim cov lej pseudo-random (“-DLIBCXX_ENABLE_RANDOM_DEVICE=OFF”).

Tau qhov twg los: opennet.ru