{"id":33621,"date":"2019-10-31T21:53:47","date_gmt":"2019-10-31T18:53:47","guid":{"rendered":"https:\/\/prohoster.info\/blog\/additional-uplinks-v-arhitekture-sistemnoj-logiki-intel-c620\/"},"modified":"2019-10-31T21:53:47","modified_gmt":"2019-10-31T18:53:47","slug":"additional-uplinks-v-arhitekture-sistemnoj-logiki-intel-c620","status":"publish","type":"post","link":"https:\/\/prohoster.info\/hr\/blog\/administrirovanie\/additional-uplinks-v-arhitekture-sistemnoj-logiki-intel-c620","title":{"rendered":"Dodatne Uplink veze u arhitekturi sistemske logike Intel C620","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

U arhitekturi x86 platformi pojavila su se dva me\u0111usobno dopunjuju\u0107a pravca. Prema jednoj verziji, potrebno je i\u0107i prema integraciji ra\u010dunskih i upravlja\u010dkih resursa unutar jednog kristala. Drugi pristup zagovara raspodjelu obaveza: procesor je opremljen sna\u017enom sabirnicom koja formira skalabilni ekosustav perifernih ure\u0111aja. Ovaj pristup je osnova topologije sistemske logike Intel C620 za visoko nivo platforme.<\/a><\/noindex><\/p>\n

Osnovna razlika u odnosu na prethodni \u010dipset Intel C610 le\u017ei u pro\u0161irenju komunikacijskog kanala procesora s perifernim ure\u0111ajima koji ulaze u sastav mikro\u010dipa PCH, koriste\u0107i PCIe veze zajedno s tradicionalnom DMI sabirnicom.<\/p>\n

\"Dodatne
\n
\nPogledajmo bli\u017ee novitete ju\u017enog mosta Intel Lewisburg: kojim su evolucijskim i revolucionarnim pristupima pro\u0161irena njegova ovla\u0161tenja u komunikaciji s procesorima?<\/p>\n

Evolucijske promjene u komunikaciji CPU-PCH<\/h2>\n

\nU okviru evolucijskog pristupa, osnovni komunikacijski kanal CPU-a s ju\u017enim mostom, koji predstavlja DMI sabirnica (Direct Media Interface), dobio je podr\u0161ku za PCIe x4 Gen3 na\u010din rada s propusno\u0161\u0107u od 8.0 GT\/S. Prije toga, u Intel C610 PCH komunikacija izme\u0111u procesora i sistemske logike odr\u017eavana je u PCIe x4 Gen 2 na\u010dinu rada s propusno\u0161\u0107u od 5.0 GT\/S.<\/p>\n

\"Dodatne
\n
\nUsporedba funkcionalnosti sistemske logike Intel C610 i C620<\/em><\/p>\n

Primijetimo, ovaj pod sustav je zna\u010dajno konzervativniji od ugra\u0111enih PCIe portova procesora, koji se obi\u010dno koriste za povezivanje GPU-a i NVMe pohranjenih ure\u0111aja, gdje se ve\u0107 dugo primjenjuje PCIe 3.0 i planira prijelaz na PCI Express Gen4.<\/p>\n

Revolucijske promjene u komunikaciji CPU-PCH<\/h2>\n

\nRevolucijskim promjenama mo\u017eemo pridru\u017eiti dodavanje novih PCIe kanala komunikacije CPU-PCH, nazvanih Dodatni uplinks. Fizi\u010dki, to su dva PCI Express porta koja rade u PCIe x8 Gen3 i PCIe x16 Gen3 re\u017eimima, oba s propusno\u0161\u0107u od 8.0 GT\/S.<\/p>\n

\"Dodatne
\n
\nZa interakciju CPU-a i Intel C620 PCH koriste se 3 sabirnice: DMI i dva PCI Express porta.<\/em><\/p>\n

Za\u0161to je bilo potrebno preispitati postoje\u0107u topologiju komunikacija s Intel C620? Prvo, unutar PCH mo\u017ee biti integrirano do 4x mre\u017enih kontrolera 10GbE s funkcionalno\u0161\u0107u RDMA. Drugo, za enkripciju mre\u017enog prometa i razmjenu s pohrambenom pod sustavom odgovara nova i br\u017ea generacija ko-procesora Intel QuickAssist Technology (QAT), koja osigurava hardversku podr\u0161ku za kompresiju i enkripciju. I kona\u010dno, \"motor inovacija\" \u2014 Innovation Engine<\/a><\/noindex>, koji \u0107e biti dostupan samo OEM proizvo\u0111a\u010dima.<\/p>\n

Fleksibilnost i skalabilnost<\/h2>\n

\nVa\u017ena karakteristika je mogu\u0107nost opcionalnog izbora ne samo topologije povezanosti PCH-a, nego i prioriteta internih resursa \u010dipa u pristupu brzim komunikacijskim kanalima s centralnim procesorom (procesorima). Osim toga, u posebnom re\u017eimu EPO (EndPoint Only Mode), povezivanje PCH-a se vr\u0161i u statusu obi\u010dnog PCI Express ure\u0111aja, koji sadr\u017ei resurse 10 GbE i Intel QAT. Pri tome su klasi\u010dni DMI interfejs, kao i niz Legacy podsystema, prikazanih na dijagramu crnom bojom, isklju\u010deni.<\/p>\n

\"Dodatne
\n
\nUnutarnja arhitektura \u010dipa Intel C620 PCH<\/em><\/p>\n

Teoretski, to omogu\u0107uje kori\u0161tenje vi\u0161e od jednog Intel C620 PCH \u010dipa u sistemu, skaliraju\u0107i funkcionalnost 10 GbE i Intel QAT u skladu s zahtjevima performansi. Pri tom se Legacy funkcije, potrebne samo u jednom izvo\u0111enju, mogu uklju\u010diti samo na jednom od instaliranih PCH \u010dipova.<\/p>\n

Dakle, kona\u010dnu rije\u010d u dizajnu imat \u0107e razvija\u010d platforme, koji djeluje na temelju kako tehnolo\u0161kih, tako i marketin\u0161kih faktora, u skladu s pozicioniranjem svakog pojedinog proizvoda.
\n
Izvor: habr.com<\/a><\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"

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Prema jednoj verziji, treba i\u0107i prema integraciji u jednom kristalu ra\u010dunalnih i upravlja\u010dkih resursa.","canonical_url":"https:\/\/prohoster.info\/hr\/blog\/administrirovanie\/additional-uplinks-v-arhitekture-sistemnoj-logiki-intel-c620","robots":"max-image-preview:large","keywords":"","webmasterTools":{"miscellaneous":""},"schema":null,"og:locale":"hr_HR","og:site_name":"ProHoster | \u041a\u0443\u043f\u0438\u0442\u044c \u043d\u0430\u0434\u0435\u0436\u043d\u044b\u0439 \u0445\u043e\u0441\u0442\u0438\u043d\u0433 \u0434\u043b\u044f \u0441\u0430\u0439\u0442\u043e\u0432 \u0441 \u0437\u0430\u0449\u0438\u0442\u043e\u0439 \u043e\u0442 DDoS, VPS VDS \u0441\u0435\u0440\u0432\u0435\u0440\u044b","og:type":"article","og:title":"\ud83e\udd47Additional Uplinks \u0432 \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u0435 \u0441\u0438\u0441\u0442\u0435\u043c\u043d\u043e\u0439 \u043b\u043e\u0433\u0438\u043a\u0438 Intel C620 | ProHoster","og:description":"\u0412 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